Counter/Timer; System - Advantech MIC-1810 User Manual

A.5

Counter/Timer

Counter chip
Channels
Resolution
Compatibility
Base Clock
Input Frequency
Clock Input
Gate Input
Counter Output
Error in
Advanced
Functions
A.6

System

Processor: Generation 6 Intel Core U-series

– MIC-1810-U0A1E: Celeron 3955U1 2.0 GHz, dual-core, two threads
– MIC-1810-U3A1E*: i3 6100U 2.3 GHz, dual-core, four threads
L3 Cache:

– MIC-1810-U0A1E: 2MB
– MIC-1810-U3A1E*: 3MB
I/O interface of Platform Controller Hub:

– Integrated Serial ATA Host Controller:
Data transfer rates up to 6.0 Gb/s (600 MB/s)
Integrated AHCI controller
– USB:
xHCI Host Controller, supporting 2 SuperSpeed USB 3.0 ports
One EHCI Host Controllers, supporting 2 HighSpeed USB 2.0 ports
Supports wake-up from sleeping states S1, S3
Supports legacy Keyboard/Mouse software
– Power Management:
Full support of ACPI C-states as implemented by the following processor
Cstates: — C0, C1, C1E, C3, C6, C7, C8, C9, C10
Enhanced Intel SpeedStep® Technology
System Memory Support**:

– Non-ECC, DDR3L/DDR3L-RS and LPDDR3 memory with dual SO-DIMM up
to 16GB
– DDR3L/DDR3L-RS I/O Voltage of 1.35V:
1333 MT/s (PC3-10600), 1600 MT/s (PC3-12800)
– 64-bit wide channels
®
– Intel Fast Memory Access (Intel
Just-in-Time Command Scheduling
MIC-1810 User Manual
N/A
2 channels (independent)
32-bit
TTL level
Internal 20MHz or external clock (10 MHz max.). Selected by software
Max. 10MHz
Low
High
Low
High
Low
High
Frequency Measurement
Pulse Width Measurement 0.1% when input signal frequency ≤ 40KHz
Pulse Output
PWM Output
®
FMA):
34
0.8 V max.
2.0 V min.
0.8 V max.
2.0 V min.
0.8 V max. @+15mA
2.0 V min. @-15mA
0.1% when input signal frequency ≥ 40KHz
within 2% when output frequency > 1MHz
within 2% when output frequency > 1MHz