Table 2-1. Processor View Of The Memory Map - Motorola MVME1603 Installation And Use Manual

Table 2-1. Processor View of the Memory Map

Processor Address
Start End
00000000 7FFFFFFF 2GB
80000000 807FFFFF 8MB
80800000 80FFFFFF 8MB
81000000 BF7FFFFF 1GB-24MB
BF800000 BFFFFFEF 8MB -16B
BFFFFFF0 BFFFFFFF 16B
C0000000 C0FFFFFF 16MB
C1000000 FEFFFFFF 1GB-32MB
FF000000 FF07FFFF 512KB
FF080000 FF0FFFFF 512KB
FF100000 FFEFFFFF 14MB
FFF00000 FFF7FFFF 512KB
FFF80000 FFFFFFFF 512KB
Notes
Size PCI Address Generated
Start
00000000 007FFFFF
00800000 00FFFFFF
01000000 3F7FFFFF
3FFFFFF0 3FFFFFFF
00000000 00FFFFFF
01000000 3EFFFFFF
1. PCI configuration accesses to CF8 (Configuration Address) and CFC
(Configuration Data) are supported by the MPC105 PCI
bridge/memory controller as specified in the PCI Specification
Revision 2.0.
2. Both Contiguous and Discontiguous mappings are supported by the
MVME1603/1604. Refer to the ISA/PCI I/O Space Mapping table for
more details.
3. This space is used for Direct Mapped PCI Configuration Space
accesses. Refer to the PCI Configuration Space Mapping section for
more details.
4. EPROM/FLASH decoding repeats every 1MB for this entire 16MB
range.
5. The usage of this 14MB address range for EPROM/FLASH is not
recommended, since future PowerPC products will redefine this area.
6. The M48T18 RTC and NVRAM device is mapped in this area. Refer
to the ISA/PCI I/O Space Mapping table for more details.
7. A read of any byte within this 16-byte range (BFFFFFF0 through
BFFFFFFF) causes a PCI IACK cycle. The data read is the IACK
vector.
Definition
End
DRAM - Not Forwarded to PCI
ISA/PCI I/O Space
PCI Configuration Space (Direct
Map)
PCI I/O Space
Reserved
PCI IACK/ Special Cycles
PCI/ISA Memory Space
PCI Memory Space
EPROM/FLASH Bank 0
EPROM/FLASH Bank 1
Reserved
EPROM/FLASH Bank 0 Repeat
EPROM/FLASH Bank 1 Repeat
Operating Instructions
Notes
1, 2, 6
3
7
4
4
4, 5
4
4
2-5
2