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F4EB OBOC
F4ED B7
F4EE CAOOOO
F4Fl F5
F4F2210Ff'6
F4F5 COE6FO
F4F8 Fl
F4F9 C021Fl
IN
ORA
JZ
PUSH
LXI
CALL
POP
CALL
BOOTON:
FOC
jCHECK SlA TUS
A
;0
=
NO ERROR
o
;OK, GO
PSW
;SAVE ERROR
H,I:HERR
jPRINT
MSG
jOISK ERROR
PSW
jCiET ERROR
THXB
jPRINT
IT
2.10
RAM ORGANIZATION
The SUPER SIX 128K RAM is configured as shown in Figure
2-~.
U55
U46
U47
U57
U48
U56
U58
U49
U50
U60
U51
U59
U61
U52
U53
U63
U54
U62
Figure 2-2. SUPER SIX RAM Configuration
The first 64K bank of RAM comprises of U46, U47, U48, U49, U51, U52, U54, U53, and
U50j U46 is the parity chip.
2.11
Z80A OMA FEA TUR ES
The Z80A OMA performs transfers, searches and search/transfers on a full-byte basis in
burst or continuous modes.
The cycle length and edge timing can be programmed to
match the speed of any port.
A bit maskable byte search can be performed either
concurrently with transfers or as an operation itself.
2.12
PSNET/IOPERATION
This paddle card converts TTL to RS232 levels. Pin 6 of the 14 pin connector on the card
represents TXOj pin 7 is R TS*j pin 8 is OTR*j pin 5 is CTS*j
1
is DCO* (normally
GND);
3
is RNG* optional; 2 is OSR*j 4 is RXO. Only pins 3, 5, 20, 2, and 1 are required for most
printers or
CR
1's. Printers employing the BUS Y line must be tied to pin 20 of the OB-25
connector on PSNET/l. A PSNET/l schematic is provided in Appendix
L.
-11-
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