Reset; Addressing; Initialization - Intel iSBC 80 Hardware Reference Manual

Programming Information
3-4
GENERATED
DO 01---- Ox BY 8251A
DOES NOT APPEAR
RECEIVER INPUT
Do 01 ----Ox ON THE DATA BUS
STJ;!
BITS
L
t t t t
RxD
I
STB~~T
G
B\-IT_S --'-_ _ .....
ST6;!
Brrs
L
PROGRAMMED
CHARACTER
LENGTH
TRANSMISSION FORMAT
CPU BYTE (5·8 BITS/CHARI
DATA C:!,RACTER
ASSEMBLED SERIAL DATA OUTPUT (hOI
STO~
L--_-'--_DA_T_A-iCHI-AR_AC_T_ER_-L--:;...----"L...-~BITW
RECEIVE FORMAT
SERIAL DATA INPUTlRxDI
DATA CHARACTER
BITS
STOD
I - - - - - L . - -.........
---f
CPU BYTE (5·8 BITS/CHAR)'
' , '
L...-_D_AT_A_C~H:~
,...A_CT_E_R _ .....
'NOTE: IF CHARACTER LENGTH IS DEFINED AS 5, 6 OR 7
BITS THE UNUSED BITS ARE SET TO "ZERO".
Figure 3-4. USART Asynchronous Mode
. Transmission Format
TRANSMIT ENABLE
1
=
enable
0= disable
DATA TERMINAL
READY
"high" will lorce DTR
output to zero
RECEIVE ENABLE
' - - - - - - - i
1
=
enable
o •
disable
SEND BREAK
'---_ _ _ _ -1 CHARACTER
1 = forces TxD "low"
o
=
normal operation
ERROR RESET
.... _---'-_ _ _ _ --1 1
z:
reset error flags
PE, OE, FE
REQUEST TO SEND
- - - - I
"high" will force RTS
output to zero
INTERNAL RESET
L-.. _ _ _ _ _ _ _ _ _
-I
"high" returns 8251A to
Mode Instruction Format
ENTER HUNT MODE'
L-.. _ _ _ _ _ _ _ _ _ _
--I
l ' enable search for Sync
Characters
Figure 3-5. USART Command
Instruction Word Format
iSBC 80/30
instruction must follow the mode and/or sync words and,
once the Command instruction is written, data can be
transmitted or received by the USART.
It is not necessary for a Command instruction to precede
all data transactions; only those transmissions that require
a change in the Command instruction. An example is a
change in the enable transmit bit or enable receive bit.
Command instructions can be written to the USAR T at
any time after one or more data operations.
After initialization, always read the chip status and check
for the TXRDY bit prior, to writing either data or com-
mand words to the USART. This ensures that any prior
input is not overwritten and lost. Note that issuing a
Command instruction with bit 6 (IR) set will return the
USART to the Mode instruction format.
3-10. RESET
To change the Mode instruction word, the USART must
receive a Reset command. The next word written to the
USART after a Reset command is assumed to be a Mode
instruction. Similarly, for sync mode, the next word after
a Mode instruction is assumed to be one or more sync
characters. All control words written into the USART
after the Mode instruction (and/or the sync character) are
assumed to be Command instructions.
3-11. ADDRESSING
The USAR T chip uses two consecutive pairs of addresses.
.The lower of the two addresses in each pair is used to read
and write
VO
data; the upper address in each pair is used to
write mode and command words and to read the USAR T
status. (Refer to table 3-2.)
3-12. INITIALIZATION
A typical USART initialization and
VO
data sequence is
presented in figure 3-6. The USART chip is initialized in
four steps:
a. Reset USART to Mode instruction format.
b. Write Mode instruction word. One function of mode
word is to specify synchronous or asynchronous
operation.
c. If synchronous mode is selected, write one or two
sync characters as required.
d. Write Command instruction word.
To avoid spurious interrupts during USART initialization,
disable the USART interrupt. This can be done by either
masking the appropriate interrupt request input at the
8259A PIC or by disabling the CPU interrupts by execut-
ing a DI instruction.