8251A Usart Programming; Mode Instruction Format; Sync Characters; Command Instruction Format - Intel iSBC 80 Hardware Reference Manual

iSBC 80/30
The !NIT/signal can also be generated by an auxiliary
RESET switch. Pressing and releasing the RESET switch
produces the same effect as the INIT/ signal described
above.
3-6. 8251A USART PROGRAMMING
The USART converts parallel output data into virtually
any serial output data format (including IBM Bi-Sync) for
half- or full-duplex operation. The USART also converts
serial input data into parallel data format.
Prior to starting transmitting or receiving data, the
USART must be loaded with a set of control words. These
control words, which define the complete functional op-
eration of the USAR T, must immediately follow a reset
(internal or external). The control words are either a Mode
instruction or a Command instruction.
3-7. MODE INSTRUCTION FORMAT
The Mode 'instruction word defines the general charac-
teristics of the US ART and must follow a re$et operation.
Once the Mode instruction word has been written into the
USART, sync characters or command instructions may be
inserted. The Mode instruction word defines the follow-
ing:
a. For Sync Mode:
(1) Character length
(2) Parity enable
(3) Even/odd parity generation and check
(4) External sync detect (not supported by
iSBC 80/30)
(5) Single or double character sync
b. For Async Mode:
(1)
Baud rate factor (Xl, X16, or X64)
(2) Character length
(3) Parity enable
(4) Even/odd parity generation and check
(5) Number of stop bits
Instruction word and data transmission formats for syn-
chronous and asynchronous modes are shown in figures
3-1 through 3-4.
3-8. SYNC CHARACTERS
Sync characters are written to the USAR T in the syn-
chronous mode only. The US ART can be programmed for
either one or two sync characters; the format of the sync
characters is at the option of the programmer.
3-9. COMMAND INSTRUCTION FORMAT
The Command instruction word shown in figure 3-5 con-
trols the operation of the addressed USAR T. A Command
Programming Information
I
scs
I
ESD
I
EP
I
PEN
I
L21 LI
I
0
I
0
I
I
L_
CHARACTER LENGTH
0 1 0 1
0 0 1
1
5 6 1 8
81TS BITS BITS
BITS
PARITY ENABLE
(1 - ENABLEI
(0 - DISABLEI
EVEN PARITY GENERATION/CHE CK
-
l ' EVEN
0-000
EXTERNAL SYNC DETECT
1 • SYNDET IS AN INPUT
0- SY'IIDET IS AN OUTPUT
SINGLE CHARACTER SYNC
1 • SINGLE SYNC CHARACTER
O' DOUBLE SYNC CHARACTER
Figure 3-1. USART Synchronous Mode
Instruction Word Format
RECEIVE FORMAT
SYNC
CHAR 1
CPU BYTES (5-8 BITS/CHARI
II
DATA CH:,RACTERS
ASSEMBLED SERIAL DATA OUTPUT (T.DI
DATA
CHA~,...AC_T_ER_S_---'
SERIAL DATA INPUT (R.DI
SYNC
I
CHAR
~
CPU BYTES (5-8 BITS/CHARI
DATA
CH~RACTERS
Figure 3-2. USART Synchronous Mode
Transmission Format
I
S2
I
SI
I
EP
I
PEN
I
L2j L 1
I
B21 B,
I
~
BAUD RATE FACTOR
0 1 0 1
0 0
1
1
SYNC
(lXI (16XI (64XI
MODE
CHARACTER LENGTH
0 1
0
1
0 0 1 1
5
6 1 8
BITS BITS BITS BITS
PARITY ENABLE
1 ~ ENABLE
0
0
DISABLE
EVEN PARlfY GENERATION/CHE
1
0
EVEN 0-000
NUMBER OF STOP BITS
0 1 0 1
0
0 1 1
INVALID
1 1'1} 2
BIT BITS BITS
(ONl Y EFFECTS Tx; Rx NEVER
REQUIRES MORE THAN ONE
STOP BIT)
Figure 3-3. USART Asynchronous Mode
Instruction Word Format
CK
3-3