Switches, Jumpers, And Reset Configuration Strapping; Reset Strapping Options - Intel IQ80315 Board Manual

I/o processor evaluation platform
Table of Contents

Advertisement

®
Intel
IQ80315 I/O Processor Evaluation Platform
2.14

Switches, Jumpers, and Reset Configuration Strapping

2.14.1

Reset Strapping Options

The IQ80315 CRB configures reset strapping options through a DIP switch, hard-wired pull-up or
pull-down resistors, and tristate CPLD outputs.
IQ80315 CRB. Configuration signals are pulled low when the switch is on, the jumper is shorted
or in the 1–2 position, or a pull-down (Pd) resistor is installed (bold indicates the default setting).
Configuration signals are pulled high when the switch is off, the jumper is open or in the 2–3
position, or a pull-up (Pu) resistor is installed (bold indicates the default setting). A silk-screen
graphic on the board next to each switch identifies the default switch settings. SWxx, Jxx, and Rxx
denote that a switch, jumper, or resistor sets the configuration.
Table 12.
Reset Strapping Options (Sheet 1 of 2)
®
Intel
80314 I/O processor companion chip (80314)
PWRUP_P1_PRIM
PWRUP_P2_PRIM
PWRUP_XS_SWRST
PWRUP_P1_SWRST
PWRUP_P2_SWRST
PWRUP_P1_ARB
PWRUP_P2_ARB
PWRUP_HLP_BSWP
Gigabit Ethernet
P0 CONFIG3
P0 CONFIG3
34
Signal
SW/J/R
R5P7
R5E5
J5F3
J5F1
J5F2
R5N2
R5N3
R5P10
J4A3
J4A2
®
Intel
IQ80315 I/O Processor Evaluation Platform Board Manual
Table 12
shows the reset strapping options on the
Configuration Options
Pd PCI: 1 is not a primary PCI bus.
Pu PCI: 1 is a primary PCI bus (default).
Pd PCI: 2 is not a primary PCI bus.
Pu PCI: 2 is a primary PCI bus (default).
1–2: 80314 CPU interface is functional after reset
(default)
2–3: 80314 CPU interface is disabled after reset
1–2: 80314 PCI1 interface is functional after reset
(default)
2–3: 80314 PCI1 interface is disabled after reset
1–2: 80314 PCI2 interface is functional after reset
(default)
2–3: 80314 PCI2 interface is disabled after reset
Pu Enable: PCI 1 arbiter (default)
Pd Disable: PCI 1 arbiter
Pu Enable: PCI 2 arbiter (default)
Pd Disable: PCI 2 arbiter
®
Pd Disable: Intel XScale
byte-swap mode
®
Pu Enable: Intel XScale
byte-swap mode
1–2: Prefer Master during auto negotiation (default)
2–3: Prefer Slave during auto negotiation
1–2: Prefer Master during auto negotiation (default)
2–3: Prefer Slave during auto negotiation

Advertisement

Table of Contents
loading

Table of Contents