Schematic Diagrams
DDR3 SO-DIMM_0
SO-DIMM A_0
D
M_A_CLK_DDR0
M_A_CLK_DDR1
Sheet 9 of 46
DDR3 SO-DIMM_0
C
Layout Note:
signal/space/signal:
85 ohm
3.3VS
B
VTT_MEM
C367
C367
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
V_VDDQ_DIMM
C88
C88
+
+
*560u_2.5V_6.6*6.6*5.9
*560u_2.5V_6.6*6.6*5.9
A
V_VDDQ_DIMM
C83
C83
1u_6.3V_X5R_04
1u_6.3V_X5R_04
B - 10 DDR3 SO-DIMM_0
5
4
CHANGE TO STANDARD
JDIMM1A
JDIMM1A
4
M_A_A[15:0]
M_A_A0
98
A0
M_A_A1
97
A1
M_A_A2
96
A2
M_A_A3
95
A3
C342 *10p_50V_NPO_04
C342 *10p_50V_NPO_04
M_A_A4
92
A4
M_A_CLK_DDR#0
M_A_A5
91
A5
M_A_A6
90
A6
C341 *10p_50V_NPO_04
C341 *10p_50V_NPO_04
M_A_A7
86
A7
M_A_CLK_DDR#1
M_A_A8
89
A8
M_A_A9
85
A9
M_A_A10
107
A10/AP
M_A_A11
84
A11
M_A_A12
83
A12/BC#
M_A_A13
119
A13
M_A_A14
80
A14
M_A_A15
78
A15
109
4
M_A_BS0
BA0
108
4
M_A_BS1
BA1
79
4
M_A_BS2
BA2
114
4
M_A_CS#0
S0#
121
4
M_A_CS#1
S1#
101
4
M_A_CLK_DDR0
CK0
103
4
M_A_CLK_DDR#0
CK0#
102
4
M_A_CLK_DDR1
CK1
104
4
M_A_CLK_DDR#1
CK1#
73
4
M_A_CKE0
CKE0
74
4
M_A_CKE1
CKE1
115
4
M_A_CAS#
CAS#
110
4
M_A_RAS#
RAS#
113
4
M_A_WE#
WE#
SA0_A_DIM0
197
SA0
SA1_A_DIM0
201
SA1
202
10,12
SMB_CLK
SCL
200
10,12
SMB_DATA
SDA
116
4
M_A_ODT0
ODT0
120
4
M_A_ODT1
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
4
M_A_DQS[7:0]
M_A_DQS0
12
DQS0
M_A_DQS1
29
DQS1
M_A_DQS2
47
DQS2
M_A_DQS3
64
DQS3
M_A_DQS4
137
DQS4
M_A_DQS5
154
DQS5
M_A_DQS6
171
DQS6
M_A_DQS7
188
DQS7
4
M_A_DQS#[7:0]
RN2
RN2
M_A_DQS#0
10
DQS0#
10K_8P4R_04
10K_8P4R_04
M_A_DQS#1
27
DQS1#
SA1_A_DIM0
M_A_DQS#2
1
8
45
DQS2#
SA0_A_DIM0
M_A_DQS#3
2
7
62
DQS3#
3
6
SA0_A_DIM1
M_A_DQS#4
135
SA0_A_DIM1 10
DQS4#
SA1_A_DIM1
M_A_DQS#5
4
5
152
SA1_A_DIM1 10
DQS5#
M_A_DQS#6
169
DQS6#
M_A_DQS#7
186
DQS7#
Oceantek 91-93469-174
Oceantek 91-93469-174
V_VDDQ_DIMM
C366
C366
C364
C364
C365
C365
C363
C363
C318
C318
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
C311
C311
C309
C309
C312
C312
C313
C313
C310
C310
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
C92
C92
C56
C56
C79
C79
C348
C348
C326
C326
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
5
4
3
V_VDDQ_DIMM
C351
C351
C93
C93
C335
C335
0.1u_10V_X5R_04
0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
M_A_DQ[63:0] 4
M_A_DQ0
5
DQ0
M_A_DQ1
7
DQ1
V_VDDQ_DIMM
15
M_A_DQ2
DQ2
M_A_DQ3
17
DQ3
M_A_DQ4
4
DQ4
M_A_DQ5
6
DQ5
16
M_A_DQ6
DQ6
18
M_A_DQ7
C66
C66
C89
C89
C316
C316
DQ7
M_A_DQ8
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
21
DQ8
M_A_DQ9
23
DQ9
M_A_DQ10
33
DQ10
35
M_A_DQ11
DQ11
M_A_DQ12
22
DQ12
M_A_DQ13
3.3VS
24
DQ13
M_A_DQ14
34
DQ14
36
M_A_DQ15
DQ15
39
M_A_DQ16
DQ16
M_A_DQ17
41
DQ17
M_A_DQ18
51
DQ18
M_A_DQ19
53
DQ19
40
M_A_DQ20
DQ20
M_A_DQ21
42
DQ21
M_A_DQ22
50
DQ22
M_A_DQ23
52
DQ23
M_A_DQ24
57
DQ24
59
M_A_DQ25
DQ25
M_A_DQ26
3.3VS
67
DQ26
M_A_DQ27
69
DQ27
M_A_DQ28
56
DQ28
58
M_A_DQ29
DQ29
M_A_DQ30
68
10
DQ30
M_A_DQ31
70
3,10
DQ31
M_A_DQ32
129
DQ32
M_A_DQ33
131
DQ33
141
M_A_DQ34
DQ34
M_A_DQ35
143
DQ35
M_A_DQ36
130
DQ36
M_A_DQ37
132
DQ37
140
M_A_DQ38
DQ38
142
M_A_DQ39
DQ39
M_A_DQ40
147
DQ40
M_A_DQ41
149
DQ41
M_A_DQ42
157
DQ42
159
M_A_DQ43
DQ43
M_A_DQ44
146
DQ44
M_A_DQ45
148
DQ45
M_A_DQ46
158
DQ46
160
M_A_DQ47
DQ47
163
M_A_DQ48
DQ48
M_A_DQ49
165
DQ49
M_A_DQ50
175
DQ50
M_A_DQ51
177
DQ51
164
M_A_DQ52
DQ52
M_A_DQ53
166
DQ53
M_A_DQ54
174
DQ54
M_A_DQ55
176
DQ55
181
M_A_DQ56
DQ56
183
M_A_DQ57
DQ57
M_A_DQ58
191
DQ58
M_A_DQ59
193
CLOSE TO JDIMM1
DQ59
M_A_DQ60
180
DQ60
V_VDDQ_DIMM
182
M_A_DQ61
DQ61
M_A_DQ62
192
DQ62
M_A_DQ63
194
DQ63
R287
R287
*0_04
*0_04
4,10
V_VREF_CA_DIMM
C315
C315
C323
C323
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
C308
C308
C314
C314
10u_6.3V_X5R_06_E
10u_6.3V_X5R_06_E
*10u_6.3V_X5R_06_E
*10u_6.3V_X5R_06_E
C71
C71
+
+
560u_2.5V_6.6*6.6*5.9
560u_2.5V_6.6*6.6*5.9
3,5,10,11,12,13,14,15,17,18,19,21,24,25,26,27,28,30,31,33,34,35,36,40
3
2
1
P/N:6-86-24204-030
C65
C65
C331
C331
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
JDIMM1B
JDIMM1B
V_VDDQ_DIMM
75
44
VDD1
VSS16
76
48
VDD2
VSS17
C317
C317
C58
C58
81
49
VDD3
VSS18
0.1u_10V_X5R_04
0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
82
54
VDD4
VSS19
87
55
VDD5
VSS20
88
60
VDD6
VSS21
93
61
VDD7
VSS22
94
65
VDD8
VSS23
99
66
VDD9
VSS24
20mils
100
71
VDD10
VSS25
105
72
VDD11
VSS26
106
127
VDD12
VSS27
C359
C359
111
128
VDD13
VSS28
C360
C360
112
133
VDD14
VSS29
0.1u_10V_X5R_04
0.1u_10V_X5R_04
2.2u_6.3V_X5R_04
2.2u_6.3V_X5R_04
117
134
VDD15
VSS30
118
138
VDD16
VSS31
123
139
VDD17
VSS32
124
144
VDD18
VSS33
145
VSS34
199
150
VDDSPD
VSS35
151
VSS36
77
155
NC1
VSS37
122
156
NC2
VSS38
R288
R288
10K_04
10K_04
125
161
NCTEST
VSS39
162
VSS40
198
167
TS#_DIMM0_1
EVENT#
VSS41
30
168
DDR3_DRAMRST#
RESET#
VSS42
172
VSS43
C31
C31
1u_6.3V_X5R_04
1u_6.3V_X5R_04
173
VSS44
C34
C34
0.1u_10V_X5R_04
0.1u_10V_X5R_04
MVREF_DQ_DIMMA
1
178
VREF_DQ
VSS45
126
179
VREF_CA
VSS46
184
4
MVREF_DQ_DIMMA
VSS47
185
VSS48
2
189
VSS1
VSS49
MVREF_DIMA_0
3
190
VSS2
VSS50
C353
C353
1u_6.3V_X5R_04
1u_6.3V_X5R_04
8
195
VSS3
VSS51
C356
C356
0.1u_10V_X5R_04
0.1u_10V_X5R_04
9
196
VSS4
VSS52
13
VSS5
14
VSS6
C352
C352
1u_6.3V_X5R_04
1u_6.3V_X5R_04
19
VSS7
20
VSS8
25
VSS9
26
203
VSS10
VTT1
31
204
VSS11
VTT2
32
VSS12
37
GND1
VSS13
G1
38
GND2
VSS14
G2
43
VSS15
Oceantek 91-93469-174
Oceantek 91-93469-174
1K_1%_04
1K_1%_04
R285
R285
MVREF_DIMA_0
R286
R286
C355
C355
C354
C354
1K_1%_04
1K_1%_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
0.1u_10V_X5R_04
MVREF_LO_1
R284
R284
24.9_1%_04
24.9_1%_04
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[09]DDR3 SO-DIMM_A_0
[09]DDR3 SO-DIMM_A_0
[09]DDR3 SO-DIMM_A_0
3,4,6,10,39
V_VDDQ_DIMM
Size
Size
Size
Document Number
Document Number
Document Number
6-71-A11S0-D02
6-71-A11S0-D02
6-71-A11S0-D02
10,39
VTT_MEM
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
3.3VS
Date:
Date:
Date:
Monday, August 19, 2013
Monday, August 19, 2013
Monday, August 19, 2013
Sheet
Sheet
Sheet
9
9
9
2
1
D
C
VTT_MEM
B
A
Rev
Rev
Rev
1.0
1.0
1.0
of
of
of
46
46
46
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