Processor 3/7 - EUROCOM A110SU Service Manual

Processor 3/7

5
U40C U40C
Haswell rPGA EDS Haswell rPGA EDS
9 M_A_DQ[63:0]
M_A_DQ0 AR15
SA_DQ_0
M_A_DQ1
AT14
SA_DQ_1
M_A_DQ2
D AM14
SA_DQ_2
M_A_DQ3
AN14
SA_DQ_3
M_A_DQ4 AT15
SA_DQ_4
M_A_DQ5 AR14
SA_DQ_5
M_A_DQ6
AN15
SA_DQ_6
M_A_DQ7
AM15
SA_DQ_7
M_A_DQ8
AM9
SA_DQ_8
M_A_DQ9 AN9
SA_DQ_9
M_A_DQ10 AM8
SA_DQ_10
M_A_DQ11
AN8
SA_DQ_11
M_A_DQ12
AR9
SA_DQ_12
M_A_DQ13
AT9
SA_DQ_13
M_A_DQ14 AR8
SA_DQ_14
M_A_DQ15 AT8
SA_DQ_15
M_A_DQ16
AJ9
SA_DQ_16
M_A_DQ17
AK9
SA_DQ_17
M_A_DQ18
AJ6
SA_DQ_18
M_A_DQ19 AK6
SA_DQ_19
M_A_DQ20 AJ10
SA_DQ_20
M_A_DQ21
AK10
SA_DQ_21
M_A_DQ22
AJ7
SA_DQ_22
M_A_DQ23
AK7
SA_DQ_23
M_A_DQ24 AF4
SA_DQ_24
M_A_DQ25 AF5
SA_DQ_25
M_A_DQ26
AF1
SA_DQ_26
M_A_DQ27
AF2
SA_DQ_27
M_A_DQ28
AG4
SA_DQ_28
M_A_DQ29 AG5
SA_DQ_29
M_A_DQ30 AG1
SA_DQ_30
M_A_DQ31
C AG2
SA_DQ_31
M_A_DQ32
J1
SA_DQ_32
M_A_DQ33
J2
SA_DQ_33
M_A_DQ34 J5
SA_DQ_34
M_A_DQ35
H5
SA_DQ_35
M_A_DQ36
H2
SA_DQ_36
M_A_DQ37
H1
SA_DQ_37
M_A_DQ38
J4
SA_DQ_38
M_A_DQ39 H4
SA_DQ_39
M_A_DQ40
F2
SA_DQ_40
M_A_DQ41
F1
SA_DQ_41
M_A_DQ42
D2
SA_DQ_42
M_A_DQ43
D3
SA_DQ_43
M_A_DQ44 D1
SA_DQ_44
M_A_DQ45
F3
SA_DQ_45
M_A_DQ46
C3
SA_DQ_46
M_A_DQ47
B3
SA_DQ_47
M_A_DQ48
B5
SA_DQ_48
M_A_DQ49 E6
SA_DQ_49
M_A_DQ50
A5
SA_DQ_50
M_A_DQ51
D6
SA_DQ_51
M_A_DQ52
D5
SA_DQ_52
M_A_DQ53
E5
SA_DQ_53
M_A_DQ54 B6
SA_DQ_54
M_A_DQ55
A6
SA_DQ_55
M_A_DQ56
E12
SA_DQ_56
M_A_DQ57
D12
SA_DQ_57
M_A_DQ58
B11
SA_DQ_58
M_A_DQ59 A11
SA_DQ_59
B M_A_DQ60
E11
SA_DQ_60
M_A_DQ61
D11
SA_DQ_61
M_A_DQ62
B12
SA_DQ_62
M_A_DQ63
A12
SA_DQ_63
SM_VREF AM3
SM_VREF
SA_DIMM_VREFDQ
F16
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
F13
SB_DIMM_VREFDQ
C294 C294
1u_6.3V_X5R_04 1u_6.3V_X5R_04 3 OF 9 3 OF 9
PZ94721-3622 PZ94721-3622
All VREF traces should be at least 20 mils wide
and 20 mils spacing to other singals/planes
DIMM
V_VDDQ_DIMM
R20 R20
1K_1%_04 1K_1%_04
R18 R18 *10mil_04 *10mil_04
A
SA_DIMM_VREFDQ MVREF_DQ_DIMMA
S D
MVREF_DQ_DIMMA 9
R17 R17
*1K_04 *1K_04 Q2 Q2 R10 R10 C30 C30
*AO3402L *AO3402L 1K_1%_04 1K_1%_04
0.1u_10V_X7R_04 0.1u_10V_X7R_04
DRAMRST_CNTRL
DRAMRST_CNTRL 3,12
5
4 3
Haswell Processor 3/7 ( DDR3L )
10 M_B_DQ[63:0]
AC7 RSVD_AC7
RSVD
M_A_CLK_DDR#0
U4
M_A_CLK_DDR#0 9
SA_CKN0
M_A_CLK_DDR0
V4
SA_CKP0 M_A_CLK_DDR0 9
M_A_CKE0
AD9
SA_CKE_0 M_A_CKE0 9
U3 M_A_CLK_DDR#1
M_A_CLK_DDR#1 9
SA_CKN1
V3 M_A_CLK_DDR1
M_A_CLK_DDR1 9
SA_CKP1
M_A_CKE1
AC9
M_A_CKE1 9
SA_CKE_1
U2
SA_CKN2
V2
SA_CKP2
AD8
SA_CKE_2
U1
SA_CKN3
V1
SA_CKP3
AC8
SA_CKE_3
M7 M_A_CS#0
M_A_CS#0 9
SA_CS_N_0
L9 M_A_CS#1
M_A_CS#1 9
SA_CS_N_1
M9
SA_CS_N_2
M10
SA_CS_N_3
M_A_ODT0
M8 M_A_ODT0 9
SA_ODT_0
L7 M_A_ODT1
M_A_ODT1 9
SA_ODT_1
L8
SA_ODT_2
L10
SA_ODT_3
M_A_BS0
V5
SA_BS_0 M_A_BS0 9
M_A_BS1
U5 M_A_BS1 9
SA_BS_1
AD1 M_A_BS2
M_A_BS2 9
SA_BS_2
V10
VSS
M_A_RAS#
U6
SA_RAS M_A_RAS# 9
M_A_WE#
U7 M_A_WE# 9
SA_WE
U8 M_A_CAS#
M_A_CAS# 9
SA_CAS
M_A_A[15:0] 9
M_A_A0
V8
SA_MA_0
M_A_A1
AC6
SA_MA_1
M_A_A2
V9
SA_MA_2
U9 M_A_A3
SA_MA_3
M_A_A4
AC5
SA_MA_4
M_A_A5
AC4
SA_MA_5
M_A_A6
AD6
SA_MA_6
M_A_A7
AC3
SA_MA_7
AD5 M_A_A8
SA_MA_8
M_A_A9
AC2
SA_MA_9
M_A_A10
V6
SA_MA_10
M_A_A11
AC1
SA_MA_11
M_A_A12
AD4
SA_MA_12
V7 M_A_A13
SA_MA_13
M_A_A14
AD3
SA_MA_14
M_A_A15
AD2
SA_MA_15
M_A_DQS#[7:0] 9
AP15 M_A_DQS#0
SA_DQS_N_0
M_A_DQS#1
AP8
SA_DQS_N_1
M_A_DQS#2
AJ8
SA_DQS_N_2
M_A_DQS#3
AF3
SA_DQS_N_3
M_A_DQS#4
J3
SA_DQS_N_4
E2 M_A_DQS#5
SA_DQS_N_5
M_A_DQS#6
C5
SA_DQS_N_6
M_A_DQS#7
C11
M_A_DQS[7:0] 9
SA_DQS_N_7
M_A_DQS0
AP14
SA_DQS_P_0
M_A_DQS1
AP9
SA_DQS_P_1
AK8 M_A_DQS2
SA_DQS_P_2
M_A_DQS3
AG3
SA_DQS_P_3
M_A_DQS4
H3
SA_DQS_P_4
M_A_DQS5
E3
SA_DQS_P_5
M_A_DQS6
C6
SA_DQS_P_6
C12 M_A_DQS7
SA_DQS_P_7
DIMM
V_VDDQ_DIMM
R12 R12
1K_1%_04 1K_1%_04
R15 R15 *10mil_04 *10mil_04
SB_DIMM_VREFDQ S D MVREF_DQ_DIMMB
MVREF_DQ_DIMMB 10
R19 R19
*1K_04 *1K_04 Q1 Q1 R16 R16 C33 C33
*AO3402L *AO3402L 1K_1%_04 1K_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
DRAMRST_CNTRL
DRAMRST_CNTRL 3,12
4 3
2 1
U40D U40D
Haswell rPGA EDS Haswell rPGA EDS
M_B_DQ0 RSVD_AG8 T62 T62
AR18 AG8
SB_DQ_0 RSVD
M_B_DQ1 M_B_CLK_DDR#0
AT18 Y4
SB_DQ_1 SB_CKN0
M_B_DQ2 M_B_CLK_DDR0
AM17 AA4
SB_DQ_2 SB_CKP0
M_B_DQ3 AM18 AF10 M_B_CKE0
SB_DQ_3 SB_CKE_0
M_B_DQ4 AR17 Y3 M_B_CLK_DDR#1
SB_DQ_4 SB_CKN1
M_B_DQ5 M_B_CLK_DDR1
AT17 AA3
SB_DQ_5 SB_CKP1
M_B_DQ6 M_B_CKE1
AN17 AG10
SB_DQ_6 SB_CKE_1
M_B_DQ7
AN18 Y2
SB_DQ_7 SB_CKN2
M_B_DQ8 AT12 AA2
SB_DQ_8 SB_CKP2
M_B_DQ9 AR12 AG9
SB_DQ_9 SB_CKE_2
M_B_DQ10
AN12 Y1
SB_DQ_10 SB_CKN3
M_B_DQ11
AM11 AA1
SB_DQ_11 SB_CKP3
M_B_DQ12
AT11 AF9
SB_DQ_12 SB_CKE_3
M_B_DQ13 AR11
SB_DQ_13
M_B_DQ14 AM12 P4 M_B_CS#0
SB_DQ_14 SB_CS_N_0
M_B_DQ15 M_B_CS#1
AN11 R2
SB_DQ_15 SB_CS_N_1
M_B_DQ16
AR5 P3
SB_DQ_16 SB_CS_N_2
M_B_DQ17
AR6 P1
SB_DQ_17 SB_CS_N_3
M_B_DQ18 AM5
SB_DQ_18
M_B_DQ19 AM6 R4 M_B_ODT0
SB_DQ_19 SB_ODT_0
M_B_DQ20 M_B_ODT1
AT5 R3
SB_DQ_20 SB_ODT_1
M_B_DQ21
AT6 R1
SB_DQ_21 SB_ODT_2
M_B_DQ22
AN5 P2
SB_DQ_22 SB_ODT_3
M_B_DQ23 AN6 R7 M_B_BS0
SB_DQ_23 SB_BS_0
M_B_DQ24 AJ4 P8 M_B_BS1
SB_DQ_24 SB_BS_1
M_B_DQ25 M_B_BS2
AK4 AA9
SB_DQ_25 SB_BS_2
M_B_DQ26
AJ1
SB_DQ_26
M_B_DQ27
AJ2 R10
SB_DQ_27 VSS
M_B_DQ28 AM1 R6 M_B_RAS#
SB_DQ_28 SB_RAS
M_B_DQ29 AN1 P6 M_B_WE#
SB_DQ_29 SB_WE
M_B_DQ30 M_B_CAS#
AK2 P7
SB_DQ_30 SB_CAS
M_B_DQ31
AK1
SB_DQ_31
M_B_DQ32 M_B_A0
L2 R8
SB_DQ_32 SB_MA_0
M_B_DQ33 M2 Y5 M_B_A1
SB_DQ_33 SB_MA_1
M_B_DQ34 M_B_A2
L4 Y10
SB_DQ_34 SB_MA_2
M_B_DQ35 M_B_A3
M4 AA5
SB_DQ_35 SB_MA_3
M_B_DQ36 M_B_A4
L1 Y7
SB_DQ_36 SB_MA_4
M_B_DQ37 M_B_A5
M1 AA6
SB_DQ_37 SB_MA_5
M_B_DQ38 L5 Y6 M_B_A6
SB_DQ_38 SB_MA_6
M_B_DQ39 M_B_A7
M5 AA7
SB_DQ_39 SB_MA_7
M_B_DQ40 M_B_A8
G7 Y8
SB_DQ_40 SB_MA_8
M_B_DQ41 M_B_A9
J8 AA10
SB_DQ_41 SB_MA_9
M_B_DQ42 M_B_A10
G8 R9
SB_DQ_42 SB_MA_10
M_B_DQ43 G9 Y9 M_B_A11
SB_DQ_43 SB_MA_11
M_B_DQ44 M_B_A12
J7 AF7
SB_DQ_44 SB_MA_12
M_B_DQ45 M_B_A13
J9 P9
SB_DQ_45 SB_MA_13
M_B_DQ46 M_B_A14
G10 AA8
SB_DQ_46 SB_MA_14
M_B_DQ47 M_B_A15
J10 AG7
SB_DQ_47 SB_MA_15
M_B_DQ48 A8
SB_DQ_48
M_B_DQ49
B8
SB_DQ_49
M_B_DQ50 M_B_DQS#0
A9 AP18
SB_DQ_50 SB_DQS_N_0
M_B_DQ51 M_B_DQS#1
B9 AP11
SB_DQ_51 SB_DQS_N_1
M_B_DQ52 M_B_DQS#2
D8 AP5
SB_DQ_52 SB_DQS_N_2
M_B_DQ53 E8 AJ3 M_B_DQS#3
SB_DQ_53 SB_DQS_N_3
M_B_DQ54 M_B_DQS#4
D9 L3
SB_DQ_54 SB_DQS_N_4
M_B_DQ55 M_B_DQS#5
E9 H9
SB_DQ_55 SB_DQS_N_5
M_B_DQ56 M_B_DQS#6
E15 C8
SB_DQ_56 SB_DQS_N_6
M_B_DQ57 M_B_DQS#7
D15 C14
SB_DQ_57 SB_DQS_N_7
M_B_DQ58 A15 AP17 M_B_DQS0
SB_DQ_58 SB_DQS_P_0
M_B_DQ59 M_B_DQS1
B15 AP12
SB_DQ_59 SB_DQS_P_1
M_B_DQ60 M_B_DQS2
E14 AP6
SB_DQ_60 SB_DQS_P_2
M_B_DQ61 M_B_DQS3
D14 AK3
SB_DQ_61 SB_DQS_P_3
M_B_DQ62 M_B_DQS4
A14 M3
SB_DQ_62 SB_DQS_P_4
M_B_DQ63 B14 H8 M_B_DQS5
SB_DQ_63 SB_DQS_P_5
M_B_DQS6
C9
SB_DQS_P_6
M_B_DQS7
C15
SB_DQS_P_7
4 OF 9 4 OF 9
PZ94721-3622 PZ94721-3622
DIMM
V_VDDQ_DIMM
R272 R272
R274 R274 *10mil_04 *10mil_04
1K_1%_04 1K_1%_04
Q13 Q13
*AO3402L *AO3402L
SM_VREF S D
V_VREF_CA_DIMM 9,10
10/22
R273 R273 R275 R275 C293 C293
*1K_04 *1K_04
1K_1%_04 1K_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
SUSB# 13,25,30,34,35,41
! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/
Title Title Title
[04] PROCESSOR 3/7 [04] PROCESSOR 3/7 [04] PROCESSOR 3/7
3,6,9,10,39 V_VDDQ_DIMM
Size Size Size Document Number Document Number Document Number
6-71-A11S0-D02 6-71-A11S0-D02 6-71-A11S0-D02
A3 A3 A3 SCHEMATIC1 SCHEMATIC1 SCHEMATIC1
Date: Date: Date: Monday, August 19, 2013 Monday, August 19, 2013 Monday, August 19, 2013 Sheet Sheet Sheet
2 1
Schematic Diagrams
D
M_B_CLK_DDR#0 10
M_B_CLK_DDR0 10
M_B_CKE0 10
M_B_CLK_DDR#1 10
M_B_CLK_DDR1 10
M_B_CKE1 10
M_B_CS#0 10
M_B_CS#1 10
M_B_ODT0 10
M_B_ODT1 10
M_B_BS0 10
M_B_BS1 10
M_B_BS2 10
M_B_RAS# 10
Sheet 4 of 46
M_B_WE# 10
C
M_B_CAS# 10
M_B_A[15:0] 10
Processor 3/7
M_B_DQS#[7:0] 10
M_B_DQS[7:0] 10
B
A
Rev Rev Rev
1.0 1.0 1.0
4 4 4 of of of 46 46 46
Processor 3/7 B - 5