Interrupts; Table A-39 Interrupt Definitions - Silicon Graphics 1450 Maintenance Manual

Interrupts

007-4276-001
9. Wait for POST to complete and for the message Press F1 to resume, Press
F2 to Setup to be displayed.
10. Turn off the system, and disconnect all AC power cords from the system.
11. Move the jumper from pins 6 and 7 back to pins 5 and 6.
12. If the baseboard is installed in a system, reinstall the access covers, connect the
power cords, and turn on the system for the change to take effect.
13. After running the special recovery mode, run the SSU to specify a new password.
See Chapter 3 in the SGI 1450 Server User's Guide.
Table A-39 recommends the logical interrupt mapping of interrupt sources; it reflects a
typical configuration, but a user can change these interrupts. Use the information to
determine how to program each interrupt. The actual interrupt map is defined using
configuration registers in the OSB4 I/O controller. I/O redirection registers in the I/O
APIC are provided for each interrupt signal; the signals define hardware interrupt signal
characteristics for APIC messages sent to local epics.
Note: If you plan to disable the IDE controller to reuse the interrupt for that controller,
you must physically unplug the IDE cable from the board connector (IDE0) if a cable is
present. Simply disabling the drive by configuring the SSU option does not make the
interrupt available.
Table A-39 Interrupt Definitions
ISA Interrupt Description
INTR Processor interrupt
NMI NMI to processor
IRQ1 Keyboard interrupt
IRQ3 Serial port A or B interrupt from SIO device, user-configurable
IRQ4 Serial port A or B interrupt from SIO device, user-configurable
IRQ5 Parallel port
Interrupts
137