Evaluation Board Hardware; Circuit Description; Handling Considerations - Analog Devices EVAL-ADXL362Z User Manual

Evaluation Board User Guide

EVALUATION BOARD HARDWARE

The EVAL-ADXL362Z has two sets of 0.1 inch spaced vias for
population of 5-pin headers to provide access to all power and
signal lines. The vias or headers allow the evaluation board to
be attached either to a prototyping board (breadboard) or to a
printed circuit board (PCB) in an existing system. Four holes
are provided in the corners of the board for mechanical attach-
ment of the EVAL-ADXL362Z
host processor is required for communication to the part.
The dimensions of the EVAL-ADXL362Z
The four mounting holes are set 15 mm × 15 mm at the corners
of the PCB.

CIRCUIT DESCRIPTION

The PCB layout of the EVAL-ADXL362Z
The EVAL-ADXL362Z is equipped with three factory installed
capacitors for bypass: two 0.1 μF capacitors (C1 and C2) and a
10 μF capacitor (C3). C2 and C3 are VS bypass capacitors for
to the application. An external
are 20 mm × 20 mm.
is shown in Figure 1.
reducing analog supply noise and C1 (located between VDDIO
and GND) is for reducing digital clocking noise.
The schematic of the
See the ADXL362
accelerometer following its connection to the application host
processor.

HANDLING CONSIDERATIONS

The EVAL-ADXL362Z
the VS or VDDIO supply and GND pins can cause damage to
the ADXL362.
Dropping the EVAL-ADXL362Z
several thousand g of acceleration, which may exceed the data
sheet absolute maximum limits. See the
for more information.
Rev. 0 | Page 3 of 8
EVAL-ADXL362Z is shown in Figure 2.
data sheet for information on configuring the
is not reverse polarity protected. Reversing
on a hard surface can generate
ADXL362
UG-351
data sheet