System Resources And Maps; Legacy Memory Map; I/O Map - VersaLogic Iguana VL-EPIC-25 Reference Manual

Legacy Memory Map

The lower 1 MB memory map of the Iguana is arranged as shown in the following table. Various
blocks of memory space between A0000h and FFFFFh are shadowed.

I/O Map

The following table lists the common I/O devices in the Iguana I/O map. User I/O devices should
be added using care to avoid the devices already in the map as shown below.
VL-EPIC-25 Reference Manual

System Resources and Maps

Table 24: Memory Map
Start End
Address Address
F0000h FFFFFh
E0000h EFFFFh
D0000h DFFFFh
C0000h CFFFFh
A0000h BFFFFh
00000h 9FFFFh
Table 25: On-Board I/O Devices
I/O Device
Reserved
PLD Internal 8254 Timers
ADC/DAC Control/Status Register
mSATA/PCIe Mux Control Register
SPI Data Register 3
SPI Data Register 2
SPI Data Register 1
SPI Data Register 0
SPI Status Register
SPI Control Register
Reserved
Timer Control Register
Interrupt Status Register
Interrupt Control Register
BIOS and Jumper Status Register
Revision Indicator Register
PLED and Product ID Register
Reserved
Super I/O Runtime Registers
COM1 Serial Port Default
COM2 Serial Port Default
Primary IDE Controller for Compact Flash
Comment
System BIOS Area
Extended System BIOS Area
ISA Expansion Area
Video BIOS Area
Legacy Video Area
Legacy System (DOS) Area
Standard
I/O Addresses
CB4h-CBFh
CB0h-CB3h
CAFh
CAEh
CADh
CACh
CABh
CAAh
CA9h
CA8h
CA6h-CA7h
CA5h
CA4h
CA3h
CA2h
CA1h
CA0h
C80h-C9Fh
C00h-C80h
3F8h– 3FFh
2F8h– 2FFh
1F0h– 1F7h
6 6
56