System Ram; Clearing Non-Volatile Ram (Nvram); Real-Time Clock (Rtc); Setting The Clock - VersaLogic Iguana VL-EPIC-25 Reference Manual

Intel atom-based sbc with ethernet, sata, usb, eusb, compactflash, msata, serial, industrial i/o, and spx
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System RAM

The Iguana accepts one 204-pin DDR3 SO-DIMM memory module with the following
characteristics:
Size
Voltage
Type

Clearing Non-volatile RAM (NVRAM)

You can clear NVRAM and reset the BIOS settings to factory defaults by following the
instructions below.
1. Power off the Iguana.
2. Install a jumper on V6[1-2].
3. Power on the Iguana and wait 10 seconds or more.
4. Power off the Iguana.
5. Remove the jumper from V6[1-2]. The board will not boot if you do not remove this
jumper.
6.
Power on the Iguana.

Real-Time Clock (RTC)

The Iguana features a battery-backed real-time clock/calendar chip. Under normal battery
conditions, the clock maintains accurate timekeeping functions when the board is powered off.
The accuracy of the RTC clock is ± 20 ppm (parts per million) at 25° C, which equates to
approximately ± 1.7 seconds per day of clock drift error (± 20 ppm is the crystal frequency
accuracy). The RTC accuracy varies with temperature. The approximate clock accuracy at any
temperature T (in C) can be calculated as follows:
ppm = [1 – 0.04(T-25)
clock drift error = 0.0864 x ppm (in seconds per day)
For example, at -40° C the ppm = -168 ± 20 ppm. For the worst case crystal accuracy of -20 ppm,
the ppm = -188 ppm, which equates to -16.2 seconds per day.
S
C
ETTING THE
The
Main BIOS setup screen
F4 if operating in terminal mode) can be used to set the time and date of the real-time clock.
VL-EPIC-25 Reference Manual
Up to 2GB (1GB or 2GB recommended)
+1.5V
DDR3, 800 MT/s (400 MHz clock)
2
] ± 20 (in ppm)
LOCK
(accessed by pressing the Delete key during the early boot cycle, or
System Features
25

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