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Analog Devices AD9843A User Manual page 3

Complete 10-bit 20 msps ccd signal processor

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CCD-MODE SPECIFICATIONS
Parameter
P
OWER CONSUMPTION
MAXIMUM CLOCK RATE
CDS
Allowable CCD Reset Transient
Max CCD Black Pixel Amplitude
Max Input Range Before Saturation
Max Input Range Before Saturation
Max Input Range Before Saturation
Max Output Range
Gain Resolution
Gain Range (Two's Complement Coding)
Min Gain (CDS Gain Register Code 32)
Medium Gain (CDS Gain Code 63)
Max Gain (CDS Gain Code 31)
VARIABLE GAIN AMPLIFIER (VGA)
Max Input Range
Max Output Range
Gain Control Resolution
Gain Monotonicity
Gain Range
Low Gain (VGA Register Code 91)
Max Gain (VGA Code 1023)
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Min Clamp Level
Max Clamp Level
SYSTEM PERFORMANCE
Gain Accuracy, VGA Code 91 to 1023
Peak Nonlinearity, 500 mV Input Signal
Peak Nonlinearity, 800 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
POWER-UP RECOVERY TIME
From Fast Recovery Mode
From Reference Standby Mode
From Total Shutdown Mode
From Power-Off Condition
NOTES
1
Input Signal Characteristics defined as follows, with 4 dB CDS gain:
500mV TYP
RESET
TRANSIENT
1V MAX
200mV MAX
INPUT
OPTICAL
SIGNAL RANGE
BLACK PIXEL
Specifications subject to change without notice.
(T
to T
, AVDD = DVDD = 3.0 V, f
MIN
MAX
Min
Typ
78
20
1
500
1
200
1
1.0
1.5
0.5
1.6
64
–2
4
10
1.6
2.0
1024
Guaranteed
2
36
256
0
63.75
–0.5
0.1
0.4
0.2
40
0.1
1
3
15
= f
= f
DATACLK
SHP
Max
Unit
Notes
mW
See TPC 1 for Power Curves
MHz
mV
See Input Waveform in Note 1
mV
V p-p
With 4 dB CDS Gain
V p-p
With –2 dB CDS Gain
V p-p
With 10 dB CDS Gain
V p-p
At Any CDS Gain Setting
Steps
See Figure 12 for CDS Gain Curve
dB
dB
4 dB Is Default with CDS Gain Disabled
dB
V p-p
V p-p
Steps
See Figure 13 for VGA Gain Curve
dB
See Page 13 for Gain Equations
dB
Steps
Measured at ADC Output
LSB
LSB
Specifications Include Entire Signal Chain
+0.5
dB
Use Equations on Page 13 to Calculate Gain
%
12 dB Gain Applied (4 dB CDS Gain)
%
8 dB Gain Applied (4 dB CDS Gain)
LSB rms
AC Grounded Input, 6 dB Gain Applied
dB
Measured with Step Change on Supply
Clocks Must Be Applied, as in Figures 5 and 6
ms
ms
ms
ms
AD9843A
= 20 MHz, unless otherwise noted.)
SHD

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