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Analog Devices AD9843A User Manual page 6

Complete 10-bit 20 msps ccd signal processor

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AD9843A
Pin Number
Name
1, 2
DRVSS
3–12
D0–D9
13
DRVDD
14
DRVSS
15, 18, 24, 41
DVSS
16
DATACLK
17
DVDD1
19
PBLK
20
CLPOB
21
SHP
22
SHD
23
CLPDM
25, 26, 35
AVSS
27
AVDD1
28
BYP1
29
BYP2
30
CCDIN
31
NC
32
BYP4
33
AVDD2
34
AUX2IN
36
AUX1IN
37
CML
38
VRT
39
VRB
40
DVDD2
42
THREE-STATE
43
NC
44
STBY
45
NC
46
SL
47
SDATA
48
SCK
TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.
PIN CONFIGURATION
48 47 46 45 44
43 42 41 40
DRVSS
1
PIN 1
DRVSS
2
IDENTIFIER
(LSB) D0
3
D1
4
D2
5
AD9843A
D3
6
TOP VIEW
D4
7
(Not to Scale)
D5
8
D6
9
D7
10
D8
11
(MSB) D9
12
13 14 15 16 17 18 19 20 21 22 23 24
NC = NO CONNECT
PIN FUNCTION DESCRIPTIONS
Type
Description
P
Digital Driver Ground
DO
Digital Data Outputs
P
Digital Output Driver Supply
P
Digital Output Driver Ground
P
Digital Ground
DI
Digital Data Output Latch Clock
P
Digital Supply
DI
Preblanking Clock Input
DI
Black Level Clamp Clock Input
DI
CDS Sampling Clock for CCD's Reference Level
DI
CDS Sampling Clock for CCD's Data Level
DI
Input Clamp Clock Input
P
Analog Ground
P
Analog Supply
AO
Internal Bias Level. Decoupling
AO
Internal Bias Level Decoupling
AI
Analog Input for CCD Signal
NC
Leave Floating or Decouple to Ground with 0.1 F
AO
Internal Bias Level Decoupling
P
Analog Supply
AI
Analog Input
AI
Analog Input
AO
Internal Bias Level Decoupling
AO
A/D Converter Top Reference Voltage Decoupling
AO
A/D Converter Bottom Reference Voltage Decoupling
P
Digital Supply
DI
Digital Output Disable. Active High
NC
May be tied High or Low. Should not be left floating.
DI
Standby Mode, Active High. Same as Serial Interface Standby Mode
NC
Internally Not Connected. May be Tied High or Low
DI
Serial Digital Interface Load Pulse
DI
Serial Digital Interface Data
DI
Serial Digital Interface Clock
39 38 37
36
AUX1IN
35
AVSS
34
AUX2IN
33
AVDD2
32
BYP4
31
NC
30
CCDIN
29
BYP2
28
BYP1
AVDD1
27
26
AVSS
25
AVSS

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