Idd Measurement And Comparator - ST STM3220F-EVAL User Manual

9 PD4 FSMC_D3
10 PD5 FSMC_D4
11 PD6 FSMC_D5
12 PD7 FSMC_D6
13 PD8 FSMC_D7
14 PD10 FSMC_D8
15 PD11 FSMC_D9
16 PD12 FSMC_D10
17 PD13 FSMC_D11

1.21 IDD measurement and comparator

For IDD measurement the circuit below is implemented on STM3220F-EVAL.
Figure 4: STM3220F-EVAL IDD measurement circuit
In Run mode, IDD current is measured thanks to TSC101BILT (U14) connected to the 1ohm
shunt resistor. In this case IDD_CNT_EN remains at high level during measurement and
JP16 jumper must be removed.
In Halt mode, the operational amplifier TSC101BILT (U14) is connected on the 1Kohm shunt
resistor. To measure a current corresponding to the Halt mode the procedure is:
1. Configure ADC to measure voltage on IDD_measurement pin.
2. Configure PA0 as interrupt input on falling edge
3. Enter in Halt or active Halt mode with IDD_CNT_EN Low
4. LP_WAKEUP falling edge wakeup the MCU after 100ms
5. start ADC conversion as soon as possible after wakeup in order to measure the
voltage corresponding to Sleep mode on 1uF capacitor
6. Reset the counter by programming IDD_CNT_EN High in less than 50mS after
the wakeup to avoid 1Kohm to be connected later on VDD_MCU
In Halt mode, the 1K resistor is connected when T1 become off after entering in Halt mode.
Q13 output of the counter allows connecting the 1K when the current IDD becomes very low.
The measurement timing is given below:
Figure 5: STM3220F-EVAL IDD Halt mode measurement timing diagram
Qing SHAO
26 GND
27 GND
28 BL_VDD
29 SDO
30 SDI
31 XL
32 XR
33 YD
34 YU
Page 15
STM3220F-EVAL Board
GND
GND
+5V
NC
NC
IO expander
U24
IO expander
U24
IO expander
U24
IO expander
U24
03/06/2009