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® UPER SUPER P3TDLR USER’S MANUAL Revision 1.0a...
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Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product. Unless you request and receive written permission from SUPER MICRO COMPUTER, you may not copy any part of this document.
About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER P3TDLR motherboard. The SUPER P3TDLR supports single or ® dual Pentium III FCPGA 500 MHz-1.26 GHz+ processors, including low ®...
Checklist ....................1-1 Contacting Supermicro ................1-2 SUPER P3TDLR Image ................1-3 SUPER P3TDLR Layout ................1-4 SUPER P3TDLR Quick Reference ............1-5 Server Works LE Chipset: System Block Diagram ......1-6 SUPER P3TDLR Motherboard Features ..........1-7 Chipset Overview ................... 1-9 Special Features .....................
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Table of Contents Power LED ....................2-10 HDD LED ....................2-10 NIC1 LED ....................2-10 NIC2 LED ....................2-10 Overheat LED ..................2-11 Reset ......................2-11 PWR_ON ....................2-11 Fan Headers .................... 2-12 Serial Ports ....................2-12 Universial Serial Bus ................2-13 Extra USB Connectors ................
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UPER P3TDLR User’s Manual Chapter 3: Troubleshooting Troubleshooting Procedures ................ 3-1 Before Power On ..................3-1 No Power ....................3-1 No Video ....................3-1 Memory Errors ..................3-2 Losing the System’s Setup Configuration ........... 3-2 Technical Support Procedures ..............3-2 Frequently Asked Questions ................
Chapter 1: Introduction Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer motherboard from an ac- knowledged leader in the industry. Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance.
UPER P3TDLR User's Manual P e n tiu m III P e n tiu m III F C P G A F C P G A C P U C P U P C 13 3/P C 10 0 133/100 M H z H ost B us R e giste re d 64 -bit 66/33 M H z...
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Chapter 1: Introduction Features of the SUPER P3TDLR ® • Single or dual Intel Pentium III FCPGA 500 MHz-1.26+ GHz processors ® and single or dual low power Pentium III processors at front bus speeds of 133 and 100 MHz Note: Please refer to the support section of our web site for a complete listing of supported processors.
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• Recovery from AC power loss control • Wake-on-LAN (WOL) • Multiple FSB clock frequency selections (set in BIOS) CD/Diskette Utilities • BIOS flash upgrade utility • Device Drivers Dimensions • SUPER P3TDLR - Full ATX: 12" x 10.5" (305 x 267 mm)
Chapter 1: Introduction Chipset Overview The ServerWorks ServerSet III LE is a high-performance core logic chipset that consists of a North Bridge and a South Bridge. The North Bridge includes an integrated main memory subsystem and a dual channel PCI bus that bridges the processor bus to a 64-bit PCI bus and a 32-bit PCI bus.
UPER P3TDLR User's Manual power switch to turn it back on) or for it to automatically return to a power on state. See the Power Lost Control setting in the BIOS chapter of this manual to change this setting. The default setting is "Always OFF." PC Health Monitoring This section describes the PC health monitoring features of the SUPER P3TDLR.
Chapter 1: Introduction CPU Overheat LED and Control This feature is available when the user enables the CPU overheat warning function in the BIOS. This allows the user to define an overheat tempera- ture. When this temperature is exceeded, both the overheat fan and the warning LED are triggered.
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UPER P3TDLR User's Manual 5.0. Note: To utilize ACPI, you must reinstall Windows 98/2000. You can check to see if ACPI has been properly installed by looking for it in the Device Manager, which is located in the Control Panel in Windows. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control.
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. The SUPER P3TDLR accommodates ATX power supplies. Although most power supplies generally meet the specifications required by the CPU, some are inadequate.
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UPER P3TDLR User's Manual rate generator, complete modem control capability and a processor inter- rupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.
Chapter 2: Installation Chapter 2 Installation This chapter covers the steps required to install the P3TDLR motherboard into a chassis, connect the data and power cables and install add-on cards. All motherboard jumpers and connections are also described. A layout and quick reference chart are on pages 1-4 and 1-5.
P3TDLR User's UPER Manual • For grounding purposes, make sure your computer chassis provides ex- cellent conductivity between the power supply, the case, the mounting fasteners and the motherboard. Unpacking The motherboard is shipped in antistatic packaging to avoid static electrical damage.
Chapter 2: Installation Connecting Cables Now that the motherboard is installed, the next step is to connect the cables to the board. These include the data (ribbon) cables for the peripherals and control panel and the power cables. Connecting Data Cables The ribbon cables used to transfer data from the peripheral devices have been carefully routed to prevent them from blocking the flow of cooling air that moves through the system from front to back.
P3TDLR User's UPER Manual Connecting the Control Panel JF1 contains header pins for various front control panel connectors. See Figure 5-1 for the pin locations of the various front control panel buttons and LED indicators. Please note that even and odd numbered pins are on opposite sides.
Chapter 2: Installation I/O Ports The I/O ports are color coded in conformance with the PC 99 specification. See Figure 2-2 below for the colors and locations of the various I/O ports. Mouse (Green) LAN1 LAN2 Keyboard COM1 Port VGA Graphics (Purple) (Turquoise) Port (Blue)
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Attaching heat sinks to the processors: Two passive heat sinks (one for each processor) have been included with your SUPER P3TDLR. Secure a heat sink to each processor with a suitable thermal compound to best conduct the heat from the processor to the heat sink.
Chapter 2: Installation Installing Memory CAUTION! Exercise extreme care when install- ing or removing DIMM modules to prevent any possible damage. The MEC must be populated in the manner described in Step 2 below. Memory support: The P3TDLR supports 128/256/512 MB and 1 GB registered ECC SDRAM DIMMs.
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P3TDLR User's UPER Manual Figure 2-5. Side View of DIMM Installation into Slot Top View of DIMM Slot Release Tab Release Tab To Remove: Use your thumbs to gently push each release tab outward. This should release the DIMM from the slot.
Chapter 2: Installation Connector Definitions Power Supply Connectors T a b le 2 -1 A T X P o w e r S u p p ly 2 4 -p in C o n n e c to r P in D e fin itio n s (A T X P O W E R ) The primary power supply connec- Pin N um ber D efinition Pin N um ber D efinition...
P3TDLR User's UPER Manual Power LED T a b le 2 -4 a O ve rh e a t L E D P in D e fin itio n s The Power LED connection is lo- (J F 1 ) cated on pins 15 and 16 of JF1.
Chapter 2: Installation Overheat LED T a b le 2 -8 O ve rh e a t L E D P in D e fin itio n s Pins 7 and 8 of JF1 are for the (J F 1 ) Overheat LED, which provides you P in with advanced warning of chas-...
P3TDLR User's UPER Manual Fan Headers* T a b le 2 -1 1 F a n H e ad e r P in D e fin itio n s (C P U , C H A S S IS a n d O H F A N s ) There are several fan headers on the P3TDLR that provide cooling N umber...
Chapter 2: Installation ATX PS/2 Keyboard and T a b le 2 -1 3 P S /2 K e yb o a rd PS/2 Mouse Ports a n d M o u s e P o rt P in D e fin itio n s (J 2 8 ) The ATX PS/2 keyboard and the PS/2 mouse are located on J28.
P3TDLR User's UPER Manual Wake-On-Modem T a b le 2 -1 6 W a k e -o n -m o d e m P in D e fin itio n s (W O M ) Wake-on-Modem (WOM) header allows your computer to P in N umber D efinition...
Chapter 2: Installation Jumper Settings Explanation of Jumpers C o n n e c t o r Pins To modify the operation of the motherboard, jumpers can be used J u m p e r to choose between optional set- C a p tings.
P3TDLR User's UPER Manual CMOS Clear T a b le 2 -2 1 C M O S C le a r J u m p e r S e ttin g s Refer to Table 2-21 for setting (J B T 1 ) Jumper JBT1 to clear CMOS.
Chapter 2: Installation SCSI Enable/Disable T a b le 2 -2 5 S C S I E n a b le /D is a b le J u m p e r S e tting s (J P 1 ) Jumper JP1 allows you to enable or disable all onboard SCSI.
P3TDLR User's UPER Manual 2-10 Floppy/Hard Disk and SCSI Connections Be aware of the following when connecting the floppy and hard disk drive cables: • A red mark on a wire typically designates the location of pin 1. • A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives.
Chapter 2: Installation Ultra160 SCSI Connector Refer to Table 2-30 for pin definitions for the Ultra160 SCSI connector T a b le 2 -3 0 6 8 -p in U ltra 1 6 0 S C S I C o n n e c to rs (J A 1 ) located at JA1.
P3TDLR User's UPER Manual 2-11 Installing Software Drivers After the OS (Operating System) has been installed, you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. After inserting this CD into your CDROM drive, the display shown in Figure 2-6 should appear.
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
UPER P3TDLR User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure the DIMM modules are properly and fully installed. 2.
What are the various types of memory that the SUPER P3TDLR motherboard can support? Answer: The SUPER P3TDLR has four DIMM slots that support 168-pin, registered DIMMs with ECC only. Note that since the motherboard has a 133 MHz memory bus, both PC133 and PC100 memory are fully supported. How- ever, since the memory bus is synchronized to the front side bus speed, you cannot use PC100 with a 133 MHz FSB.
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UPER P3TDLR User's Manual your BIOS before downloading. Select your motherboard model and down- load the BIOS file to your computer. Unzip the BIOS update file and you will find the readme.txt (flash instructions), the flash.com (BIOS flash utility) and the BIOS image (xxxxxx.rom) files.
Chapter 3: Troubleshooting will have instant off capabilities as long as the BIOS has control of the system. When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count (the first screen that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system.
Chapter 4 BIOS Introduction This chapter describes the AMIBIOS for the SUPER P3TDLR. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based application. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
UPER P3TDLR User's Manual BIOS Features • Supports Plug and Play V1.0A and DMI 2.1 • Supports Intel PCI (Peripheral Component Interconnect) (PME) local bus specification • Supports Advanced Power Management (APM) specification v 1.1 • Supports ACPI • Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics Industries Ltd.
Chapter 7: BIOS/Setup The Main BIOS Setup Menu Press the <Delete> key during the POST (Power On Self Test) to enter the Main Menu of the BIOS Setup Utility. All Main Setup options are described in this section. The Main BIOS Setup screen is displayed below. BIOS SETUP UTILITY Main Advanced...
UPER P3TDLR User's Manual Advanced BIOS Setup Choose "Advanced BIOS Setup" from the AMIBIOS Setup Utility main menu with the <Left/Right> arrow keys. You should see the following display. Select one of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub screen for that item.
Chapter 7: BIOS/Setup Super IO Configuration BIOS SETUP UTILITY Advanced Configure Nat 317 Serial Port(s)and Parallel P Serial Port1 Address [3F8] Serial Port1 IRQ Serial Port2 Address [2F8] Serial Port2 IRQ Parallel Port Address [378] Parallel Port IRQ Parallel Port Mode [ECP] ECP Mode DMA Channel ↔...
UPER P3TDLR User's Manual Serial Port 2 IRQ This option specifies the Interrupt Request address of serial port 2. settings for this item include Disabled, 4 and 3. Select the desired setting and then press <Enter>. Parallel Port Address This option specifies the I/O address used by the parallel port. The settings for this item include Disabled, 378, 278 and 3BC.
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Chapter 7: BIOS/Setup Primary IDE Master When entering "Setup", BIOS automatically detects the presence of IDE devices. This displays the auto detection status of the IDE de vices. You can also manually configure the IDE drives by providing the following information: This option allows the user to configure the IDE devices.
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UPER P3TDLR User's Manual PIO Mode IDE PIO (Programmable I/O) mode programs timing cycles be tween the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The settings are: Auto, 0, 1, 2, 3 and 4. DMA Mode This item allows the users to select the DMA mode.
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Chapter 7: BIOS/Setup Primary IDE Slave When the system enters "Setup", BIOS automatically detects the presence of IDE devices. This option displays the auto detection status of IDE de- vices. The settings for "Primary IDE Slave" are the same as those for the "Primary IDE Master".
UPER P3TDLR User's Manual Floppy Configuration Floppy A Use this option to specify which of floppy drive you have installed in the A drive. The settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/ 2", 1.44 MB 3 1/2"...
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Chapter 7: BIOS/Setup BootUp Num Lock This option is used to select the status of the Number Lock function on your keyboard on bootup. The settings are On and Off. BootUp CPU Speed This option is used set the CPU speed to either High or Low. PS/2 Mouse Support This option specifies whether a PS/2 Mouse will be supported.
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UPER P3TDLR User's Manual Wait for F1 if Error This settings for this option are Enabled and Disabled. Disabled: This prevents the AMIBIOS to wait on an error for user intervention. This setting should be used if there is a known reason for a BIOS error to appear. An example would be a system administrator must remote boot the system when the computer system does not have a keyboard currently attached.
Chapter 7: BIOS/Setup System BIOS Cacheable This option enables you to move the system BIOS to the memory cache to improve performance. Settings are Enabled and Disabled. Event Log Configuration Event Logging This option Enables or Disables the logging of events. You can use this screen to select options for the Event Log Configuration Settings.
UPER P3TDLR User's Manual Peripheral Device Configuration Onboard SCSI This option allows you to enable the onboard SCSI. The settings are En- abled and Disabled. Power Lost Control This option determines how the system will respond when power is reap- plied after a power loss condition.
Chapter 7: BIOS/Setup Chipset Setup Choose "Chipset Setup" from the AMIBIOS Setup Utility main menu. The screen is shown below. All Chipset Setup options are described following the screen. You can use this screen to select options for the main controller hub (MCH, or North Bridge) configuration.
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UPER P3TDLR User's Manual DC00, 16k Shadow These options specify how the 16 KB of video ROM at each of the above addresses is treated. When Disabled, the contents of the video ROM are not copied to RAM. When Enabled, the contents of 16 KB of video ROM beginning at the above address are copied (shadowed) from ROM to RAM for faster application.
Chapter 7: BIOS/Setup ISA IO Cycle Delay This settings for this option are Full Delay, 1.5 BCLK, 2.5 BLCK and 3.5 BLCK. MPS 1.4 Support The settings for this option are Enabled and Disabled. PCI PnP Setup Choose PCI/PnP Setup from the AMIBIOS Setup main menu. All PCI/PnP options are described in this section.
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UPER P3TDLR User's Manual I/O, and DMA settings. Set this option if the system is running Windows 95®, Windows 98® or Windows 2000®. Several other operating systems are also PnP-aware. Reset Configuration Data Choosing the Yes setting will cause the PnP configuration data in the BIOS to be cleared on the next boot up.
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Chapter 7: BIOS/Setup PCI Slot-1 IRQ Preference This option allows you to change the IRQ for PCI slot 1. The settings are Auto, 3, 4, 5, 7, 9, 10, 11, 12, 14, and 15. The Auto setting lets the BIOS assign the IRQ.
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UPER P3TDLR User's Manual Onboard SCSI IRQ Preference This option allows you to change the IRQ for the onboard SCSI. The set- tings are Auto, 3, 4, 5, 7, 9, 10, 11, 12, 14, and 15. The Auto setting lets the BIOS assign the IRQ.
Chapter 7: BIOS/Setup Power Setup Choose "Power Setup" from the AMIBIOS Setup main menu. All Power Setup options are described in this section. The Power Setup screen is shown below. BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit ACPI Aware O/S [Yes] Power Management...
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UPER P3TDLR User's Manual Sleep Button Enable This option is to enable the use of the sleep button. The settings are Suspend and Disabled. Green PC Monitor Power State This option specifies the power state that a green PC-compliant monitor enters when BIOS places it in a power saving state after the specified period of display inactivity has expired.
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Chapter 7: BIOS/Setup IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 With the above options, you can monitor each interrupt request and resume the system's normal power up state when activated. Settings are Ignore and Monitor. All IRQs are defaulted to Ignore except for IRQ 1, 12 and 14, which default to Monitor.
UPER P3TDLR User's Manual Boot Setup Choose "Boot Setup" from the AMIBIOS Setup main menu. All Boot Setup options are described in this section. The Boot Setup screen is shown below. BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit >...
Chapter 7: BIOS/Setup 3rd Boot Device The settings for the 3rd Boot Device are Removable Device, ATAPI CDROM, Hard Drive and Disabled. Hard Disk Drives Use this screen to view the hard drives that have been auto-detected or entered manually on your system. Removable Devices Use this screen to view the removable devices that have been auto-de- tected or entered manually on your system.
UPER P3TDLR User's Manual Security Setup Choose "Security Setup" from the AMIBIOS Setup main menu. All Security Setup options are described in this section. The Security Setup screen is shown below. BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit Install or Change the Supervisor Password Not Installed...
Chapter 7: BIOS/Setup Change Supervisor Password This option allows you to change supervisor password that was entered previously. Change User Password This option allows you to change a user password that was entered previ- ously. Clear User Password Use this option to clear the user password so that it is not required to be entered when the system boots up.
UPER P3TDLR User's Manual 4-10 Exit Setup Choose "Exit Setup" from the AMIBIOS Setup main menu. All Exit Setup options are described in this section. The Exit Setup screen is shown below. BIOS SETUP UTILITY Main Advanced Chipset PCIPnP Power Boot Security Exit...
Chapter 7: BIOS/Setup Load Optimal Defaults Highlighting this setting and then pressing <Enter> provides the optimum performance settings for all devices and system features. Load Failsafe Defaults Highlighting this setting and then pressing <Enter> provides the safest set of parameters for the system. Use them if the system is behaving errati- cally.
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Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
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UPER P3TDLR User’s Manual AMIBIOS Error Beep Codes POST Error Beep Codes 1 beep: Refresh failure - the memory refresh circuitry on the motherboard is faulty. (Fatal error) 3 beeps: Base 64KB memory failure - memory failure occurred in the first 64KB of memory.
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Appendix A: BIOS Error Beep Codes If you hear... it's because... 5 short and 1 long beeps no memory detected in system 6 short and 1 long beeps EDO memory detected in system 7 short and 1 long beeps SMBUS (System Management Bus) error...
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Appendix B: AMIBIOS POST Diagnostic Error Messages Appendix B AMIBIOS POST Diagnostic Error Messages This section describes the power-on self-tests (POST) port 80 codes for the AMIBIOS. Check Point Description Code copying to specific areas is done. Passing control to INT 19h boot loader next. NMI is Disabled.
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UPER P3TDLR User’s Manual Check Point Description The keyboard controller command byte is written. Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during power Initializing CMOS Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End>...
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Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next. Bus initialization system, static, output devices will be done next, if present. Passing control to the video ROM to perform any required configuration before the video ROM test.
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UPER P3TDLR User’s Manual Check Point Description Initializing the bus input, IPL, and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next. The descriptor tables are prepared.
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Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
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UPER P3TDLR User’s Manual Check Point Description The DMA page register test passed. Performing the DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed. Programming DMA controllers 1 and 2 next.
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Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description programming before WINBIOS Setup been completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
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UPER P3TDLR User’s Manual Check Point Description Any initialization required after the option ROM test has been completed. Configuring the timer data area and printer base address next. Set the timer and printer base addresses. Setting the RS-232 base address next. Returned after setting...
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Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Returned from adaptor E000h control. Next, performing initialization required after the E000 option ROM had control. Initialization after E000 option control completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next.