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Supero SUPER P3TDLR User Manual

Supermicro p3tdlr motherboards: user guide
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UPER
SUPER P3TDLR
USER'S MANUAL
Revision 1.0a

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  • Page 1 ® UPER SUPER P3TDLR USER’S MANUAL Revision 1.0a...
  • Page 2 Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

  • Page 3: Preface

    About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the SUPER P3TDLR motherboard. The SUPER P3TDLR supports single or ® dual Pentium III FCPGA 500 MHz-1.26 GHz+ ®...

  • Page 4: Table Of Contents

    Checklist ... 1-1 Contacting Supermicro ... 1-2 SUPER P3TDLR Image ... 1-3 SUPER P3TDLR Layout ... 1-4 SUPER P3TDLR Quick Reference ... 1-5 Server Works LE Chipset: System Block Diagram ... 1-6 SUPER P3TDLR Motherboard Features ... 1-7 Chipset Overview ... 1-9 Special Features ...
  • Page 5 Power LED ... 2-10 HDD LED ... 2-10 NIC1 LED ... 2-10 NIC2 LED ... 2-10 Overheat LED ... 2-11 Reset ... 2-11 PWR_ON ... 2-11 Fan Headers ... 2-12 Serial Ports ... 2-12 Universial Serial Bus ... 2-13 Extra USB Connectors ... 2-13 LAN1/LAN2 Ports ...
  • Page 6 UPER P3TDLR User’s Manual Chapter 3: Troubleshooting Troubleshooting Procedures ... 3-1 Before Power On ... 3-1 No Power ... 3-1 No Video ... 3-1 Memory Errors ... 3-2 Losing the System’s Setup Configuration ... 3-2 Technical Support Procedures ... 3-2 Frequently Asked Questions ...

  • Page 7: Chapter 1: Introduction

    SCSI Accessories (depending on motherboard) One (1) 68-pin LVD SCSI cable One (1) set of SCSI driver diskettes One (1) SCSI manual One (1) Supermicro CD or diskettes containing drivers and utilities One (1) BIOS User's Manual Chapter 1 Introduction...

  • Page 8: Contacting Supermicro

    UPER P3TDLR User's Manual CONTACTING SUPERMICRO Headquarters Address: Super Micro Computer, Inc. 980 Rock Avenue San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 E-mail: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web site: www.supermicro.com European Office Address: Super Micro Computer B.V.

  • Page 9: Super P3Tdlr Image

    Chapter 1: Introduction SUPER P3TDLR Figure 1-4A. SUPER P3TDLR Image...
  • Page 10 UPER P3TDLR User's Manual Figure 1-8A. SUPER P3TDLR Layout PS/2 KB/ MOUSE FCPGA Processor Parallel Port NIC1 FCPGA NIC2 Processor PCI 1 PCI 2 JP24 Also see the figure on page 2-7 for the locations of the I/O ports and 2-8 for the Front Control Panel (JF1) connectors.
  • Page 11 P3TDLR Quick Reference Jumpers Description JBT1 CMOS Clear (p. 2-18) SCSI (p. 2-19) Front Side Bus Speed (p. 2-17) Pins 1-2 (Auto) Overheat Alarm (p. 2-18) LAN1 Enable/Disable (p. 2-18) Open (Enabled) JP11 Power Supply Fail (p. 2-11) JP12 Power Supply Fail (p. 2-11)

  • Page 12: Server Works Le Chipset: System Block Diagram

    UPER P3TDLR User's Manual P e n tiu m III 133/100 M H z H ost B us 64 -bit 66/33 M H z P C I S lots U ltra1 60 S C S I S lot U S B 1.5 M b/sec...
  • Page 13 Features of the SUPER P3TDLR • Single or dual Intel Pentium and single or dual low power Pentium speeds of 133 and 100 MHz Note: Please refer to the support section of our web site for a complete listing of supported processors.
  • Page 14 • Recovery from AC power loss control • Wake-on-LAN (WOL) • Multiple FSB clock frequency selections (set in BIOS) CD/Diskette Utilities • BIOS flash upgrade utility • Device Drivers Dimensions • SUPER P3TDLR - Full ATX: 12" x 10.5" (305 x 267 mm)

  • Page 15: Chipset Overview

    Special Features ATI Graphics Controller The P3TDLR has an integrated ATI video controller based on the Rage XL graphics chip. The Rage XL fully supports sideband addressing and AGP texturing. An 8 MB graphics memory chip has been integrated aboard the P3TDLR to provide graphics memory.

  • Page 16: Pc Health Monitoring

    The default setting is "Always OFF." PC Health Monitoring This section describes the PC health monitoring features of the SUPER P3TDLR. All have an onboard System Hardware Monitor chip that supports PC health monitoring. Seven Onboard Voltage Monitors for the CPU Core, Chipset Voltage, +5V and +12V The onboard voltage monitor will scan these seven voltages continuously.

  • Page 17: 1-5 Acpi/Pc 98 Features

    The system BIOS is protected by hardware so that no virus can infect the BIOS area. The user can only change the BIOS content through the flash utility provided by SUPERMICRO. This feature can prevent viruses from infecting the BIOS area and destroying valuable data.
  • Page 18 UPER P3TDLR User's Manual 5.0. Note: To utilize ACPI, you must reinstall Windows 98/2000. check to see if ACPI has been properly installed by looking for it in the Device Manager, which is located in the Control Panel in Windows.

  • Page 19: Power Supply

    LAN traffic is kept to a minimum and users are not interrupted. The motherboards have a 3-pin header (WOL) to connect to the 3-pin header on a Network Interface Card (NIC) that has WOL capability.
  • Page 20 UPER P3TDLR User's Manual rate generator, complete modem control capability and a processor inter- rupt system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support higher speed modems.

  • Page 21: Chapter 2: Installation

    Tools Required The only tools you will need to install the P3TDLR into the chassis are a long and a short Philips screwdriver. Handling the P3TDLR Motherboard Static electrical discharge can damage electronic components.

  • Page 22: Unpacking

    Check compatibility of motherboard ports and I/O shield: The P3TDLR requires a chassis big enough to support a 12" x 10" motherboard, such as Supermicro's SC810 1U rackmount. Make sure that the I/O ports on the motherboard properly align with their respective holes in the I/O shield at the back of the chassis.

  • Page 23: Connecting Cables

    Control Panel Cable (JF1 Supplied with Supermicro Servers, see next page) Connecting Power Cables The P3TDLR has a 24-pin primary power supply connector desig- nated "ATX Power" for connection to the ATX power supply. The ATX Power connector also is keyed to accept 20-pin power connec- tors if the power supply you are using has that type.

  • Page 24: Connecting The Control Panel

    P3TDLR User's UPER Connecting the Control Panel JF1 contains header pins for various front control panel connectors. See Figure 5-1 for the pin locations of the various front control panel buttons and LED indicators. Please note that even and odd numbered pins are on opposite sides.

  • Page 25: I/O Ports

    Installing the FCPGA processors: The P3TDLR has two 370-pin sockets, which support single or dual Intel ® Pentium III FCPGA 500 MHz-1.26+ GHz processors and single or dual ®...
  • Page 26 Attaching heat sinks to the processors: Two passive heat sinks (one for each processor) have been included with your SUPER P3TDLR. Secure a heat sink to each processor with a suitable thermal compound to best conduct the heat from the processor to the heat sink.

  • Page 27: Installing Memory

    PC133 with a 100 MHz FSB will result in 100 MHz memory operation. Memory Slots: The P3TDLR has four DIMM slots. There is no need to install the DIMM The P3TDLR is not sensitive to the installed modules in pairs.
  • Page 28 P3TDLR User's UPER Manual Figure 2-5. Side View of DIMM Installation into Slot Top View of DIMM Slot Release Tab Release Tab To Remove: Use your thumbs to gently push each release tab outward. This should release the DIMM from the slot.

  • Page 29: Connector Definitions

    Connector Definitions Power Supply Connectors The primary power supply connec- tor on the P3TDLR is designated as ATX POWER. This is a 24-pin connector, which will also accept 20-pin power connectors, which are used with some power sup- plies. If a 24-pin connector is used, please refer to Table 2.1 for...

  • Page 30: Power Led

    P3TDLR User's UPER Power LED The Power LED connection is lo- cated on pins 15 and 16 of JF1. When illuminated, this LED indi- cates that power is applied to the system. There is also a 3-pin header for the Power LED located at JP61.

  • Page 31: Overheat Led

    Overheat LED Pins 7 and 8 of JF1 are for the Overheat LED, which provides you with advanced warning of chas- sis overheating. This LED will also illuminate if the blower fan fails, which will cause the chassis tem- perature to rise. Refer to Table 2- 8 for pin definitions and Figure 2-2 for pin locations.

  • Page 32: Fan Headers

    P3TDLR User's UPER Fan Headers* There are several fan headers on the P3TDLR that provide cooling for various components. tion to one fan header for each processor, there are two over- heat and two chassis fan head- ers. If used, a blower fan should...

  • Page 33: Extra Usb Connectors

    ATX PS/2 Keyboard and PS/2 Mouse Ports The ATX PS/2 keyboard and the PS/2 mouse are located on J28. See Table 2-13 for pin definitions. (The mouse port is above the key- board port. See Figure 2-12.) Universal Serial Bus (USB) Two Universal Serial Bus connec- tors are located on U38.

  • Page 34: Wake-On-Modem

    DIP Switch Settings DIP Switch 1: Core/Bus Ratio One DIP switch labeled SW1 is lo- cated on the P3TDLR motherboard. The switch housing has four indi- vidual switches. They are used to set the CPU core/bus ratio. table on the right will show you how to choose the proper CPU core/bus ratio.

  • Page 35: Jumper Settings

    Jumper Settings Explanation of Jumpers To modify the operation of the motherboard, jumpers can be used to choose between optional set- tings. Jumpers create shorts be- tween two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board.

  • Page 36: Cmos Clear

    P3TDLR User's UPER CMOS Clear Refer to Table 2-21 for setting JBT1 to clear CMOS. move the AC power cord from the system before clearing CMOS. Over Heat Alarm Jumper JP7 allows you to enable or disable the over heat alarm.

  • Page 37: Scsi Enable/Disable

    SCSI Enable/Disable Jumper JP1 allows you to enable or disable all onboard SCSI. The normal (default) position is open to enable SCSI operation. See Table 2-25 for jumper settings. Onboard VGA Enable/Disable Jumper JP62 allows you to enable or disable the onboard VGA. The normal (default) position is open to enable VGA operation.

  • Page 38: 2-10 Floppy/Hard Disk And Scsi Connections

    P3TDLR User's UPER 2-10 Floppy/Hard Disk and SCSI Connections Be aware of the following when connecting the floppy and hard disk drive cables: • A red mark on a wire typically designates the location of pin 1. • A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives.

  • Page 39: Ultra160 Scsi Connector

    Ultra160 SCSI Connector Refer to Table 2-30 for pin definitions for the Ultra160 SCSI connector located at JA1. T a b le 2 -3 0 6 8 -p in U ltra 1 6 0 S C S I C o n n e c to rs (J A 1 ) C onnector C ontact N umber...

  • Page 40: 2-11 Installing Software Drivers

    2-11 Installing Software Drivers After the OS (Operating System) has been installed, you must install the software drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your motherboard. After inserting this CD into your CDROM drive, the display shown in Figure 2-6 should appear. (If this display does not appear, click on the My Computer icon and then on the icon representing your CDROM drive.

  • Page 41: Chapter 3: Troubleshooting

    Troubleshooting Procedures Use the following procedures to troubleshoot your system. followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Note: Always disconnect the power cord before adding, changing or installing any hardware components.

  • Page 42: Memory Errors

    UPER P3TDLR User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure the DIMM modules are properly and fully installed.

  • Page 43: Frequently Asked Questions

    4. Distributors: For immediate assistance, please have your account number ready when placing a call to our technical support department. We can be reached by e-mail at < support@supermicro.com > or by fax at (408) 503-8019. Frequently Asked Questions...
  • Page 44 UPER P3TDLR User's Manual your BIOS before downloading. Select your motherboard model and down- load the BIOS file to your computer. Unzip the BIOS update file and you will find the readme.txt (flash instructions), the flash.com (BIOS flash utility) and the BIOS image (xxxxxx.rom) files.

  • Page 45: Returning Merchandise For Service

    Chapter 3: Troubleshooting will have instant off capabilities as long as the BIOS has control of the system. When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count (the first screen that appears when the system is turned on), the momentary on/off switch must be held for more than four seconds to shut down the system.
  • Page 46 UPER P3TDLR User's Manual NOTES...

  • Page 47: Chapter 4: Bios

    Introduction This chapter describes the AMIBIOS for the SUPER P3TDLR. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily upgraded using a floppy disk-based application. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.

  • Page 48: Bios Features

    UPER P3TDLR User's Manual BIOS Features • Supports Plug and Play V1.0A and DMI 2.1 • Supports Intel PCI (Peripheral Component Interconnect) (PME) local bus specification • Supports Advanced Power Management (APM) specification v 1.1 • Supports ACPI • Supports Flash ROM AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics Industries Ltd.

  • Page 49: Main Bios Setup Menu

    The Main BIOS Setup Menu Press the <Delete> key during the POST (Power On Self Test) to enter the Main Menu of the BIOS Setup Utility. All Main Setup options are described in this section. The Main BIOS Setup screen is displayed below. Main Advanced Chipset...

  • Page 50: Advanced Bios Setup

    UPER P3TDLR User's Manual Advanced BIOS Setup Choose "Advanced BIOS Setup" from the AMIBIOS Setup Utility main menu with the <Left/Right> arrow keys. of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub screen for that item. Advanced BIOS Setup options are displayed by highlighting the option using the arrow keys.

  • Page 51: Super Io Configuration

    Super IO Configuration BIOS SETUP UTILITY Advanced Configure Nat 317 Serial Port(s)and Parallel P Serial Port1 Address Serial Port1 IRQ Serial Port2 Address Serial Port2 IRQ Parallel Port Address Parallel Port IRQ Parallel Port Mode ECP Mode DMA Channel V02.03 (C)Copyright 1985-2000, American Megatrends, Inc. The Super IO Configuration includes the following items: Serial Port 1 Address This option specifies the base I/O port address of serial port 1.

  • Page 52: Ide Configuration

    UPER P3TDLR User's Manual Serial Port 2 IRQ This option specifies the Interrupt Request address of serial port 2. settings for this item include Disabled, 4 and 3. and then press <Enter>. Parallel Port Address This option specifies the I/O address used by the parallel port. The settings for this item include Disabled, 378, 278 and 3BC.
  • Page 53 Primary IDE Master When entering "Setup", BIOS automatically detects the presence of IDE devices. This displays the auto detection status of the IDE de vices. You can also manually configure the IDE drives by providing the following information: This option allows the user to configure the IDE devices. When the desired item is highlighted (selected), press <Enter>...
  • Page 54 UPER P3TDLR User's Manual PIO Mode IDE PIO (Programmable I/O) mode programs timing cycles be tween the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The settings are: Auto, 0, 1, 2, 3 and 4.
  • Page 55 Chapter 7: BIOS/Setup Primary IDE Slave When the system enters "Setup", BIOS automatically detects the presence of IDE devices. This option displays the auto detection status of IDE de- vices. The settings for "Primary IDE Slave" are the same as those for the "Primary IDE Master".

  • Page 56: Floppy Configuration

    UPER P3TDLR User's Manual Floppy Configuration Floppy A Use this option to specify which of floppy drive you have installed in the A drive. The settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/ 2", 1.44 MB 3 1/2"...
  • Page 57 Chapter 7: BIOS/Setup BootUp Num Lock This option is used to select the status of the Number Lock function on your keyboard on bootup. The settings are On and Off. BootUp CPU Speed This option is used set the CPU speed to either High or Low. PS/2 Mouse Support This option specifies whether a PS/2 Mouse will be supported.
  • Page 58 UPER P3TDLR User's Manual Wait for F1 if Error This settings for this option are Enabled and Disabled. Disabled: This prevents the AMIBIOS to wait on an error for user intervention. This setting should be used if there is a known reason for a BIOS error to appear. An example would be a system administrator must remote boot the system when the computer system does not have a keyboard currently attached.

  • Page 59: Event Log Configuration

    Chapter 7: BIOS/Setup System BIOS Cacheable This option enables you to move the system BIOS to the memory cache to improve performance. Settings are Enabled and Disabled. Event Log Configuration Event Logging This option Enables or Disables the logging of events. You can use this screen to select options for the Event Log Configuration Settings.

  • Page 60: Peripheral Device Configuration

    UPER P3TDLR User's Manual Peripheral Device Configuration Onboard SCSI This option allows you to enable the onboard SCSI. The settings are En- abled and Disabled. Power Lost Control This option determines how the system will respond when power is reap- plied after a power loss condition.

  • Page 61: Chipset Setup

    Chipset Setup Choose "Chipset Setup" from the AMIBIOS Setup Utility main menu. The screen is shown below. All Chipset Setup options are described following the screen. You can use this screen to select options for the main controller hub (MCH, or North Bridge) configuration. Main Advanced Chipset...
  • Page 62 UPER P3TDLR User's Manual DC00, 16k Shadow These options specify how the 16 KB of video ROM at each of the above addresses is treated. When Disabled, the contents of the video ROM are not copied to RAM. When Enabled, the contents of 16 KB of video ROM beginning at the above address are copied (shadowed) from ROM to RAM for faster application.

  • Page 63: Pci Pnp Setup

    ISA IO Cycle Delay This settings for this option are Full Delay, 1.5 BCLK, 2.5 BLCK and 3.5 BLCK. MPS 1.4 Support The settings for this option are Enabled and Disabled. PCI PnP Setup Choose PCI/PnP Setup from the AMIBIOS Setup main menu. All PCI/PnP options are described in this section.
  • Page 64 UPER P3TDLR User's Manual I/O, and DMA settings. Set this option if the system is running Windows 95®, Windows 98® or Windows 2000®. Several other operating systems are also PnP-aware. Reset Configuration Data Choosing the Yes setting will cause the PnP configuration data in the BIOS to be cleared on the next boot up.
  • Page 65 PCI Slot-1 IRQ Preference This option allows you to change the IRQ for PCI slot 1. The settings are Auto, 3, 4, 5, 7, 9, 10, 11, 12, 14, and 15. The Auto setting lets the BIOS assign the IRQ. PCI Slot-2 IRQ Preference This option allows you to change the IRQ for PCI slot 2.
  • Page 66 UPER P3TDLR User's Manual Onboard SCSI IRQ Preference This option allows you to change the IRQ for the onboard SCSI. The set- tings are Auto, 3, 4, 5, 7, 9, 10, 11, 12, 14, and 15. The Auto setting lets the BIOS assign the IRQ.

  • Page 67: Power Setup

    Power Setup Choose "Power Setup" from the AMIBIOS Setup main menu. Setup options are described in this section. shown below. Main Advanced Chipset ACPI Aware O/S Power Management Power Button Mode Sleep Button Enable Green PC Monitor Power State Video Power Down Mode Hard Disk Power Down Mode Inactivity Timer Suspend Timeout (Minutes)
  • Page 68 UPER P3TDLR User's Manual Sleep Button Enable This option is to enable the use of the sleep button. The settings are Suspend and Disabled. Green PC Monitor Power State This option specifies the power state that a green PC-compliant monitor enters when BIOS places it in a power saving state after the specified period of display inactivity has expired.
  • Page 69 Chapter 7: BIOS/Setup IRQ7 IRQ9 IRQ10 IRQ11 IRQ12 IRQ14 IRQ15 With the above options, you can monitor each interrupt request and resume the system's normal power up state when activated. Settings are Ignore and Monitor. All IRQs are defaulted to Ignore except for IRQ 1, 12 and 14, which default to Monitor.

  • Page 70: Boot Setup

    UPER P3TDLR User's Manual Boot Setup Choose "Boot Setup" from the AMIBIOS Setup main menu. All Boot Setup options are described in this section. below. Main Advanced Chipset > Boot Device Priority > Hard Disk Drives > Removable Devices >...

  • Page 71: Hard Disk Drives

    3rd Boot Device The settings for the 3rd Boot Device are Removable Device, ATAPI CDROM, Hard Drive and Disabled. Hard Disk Drives Use this screen to view the hard drives that have been auto-detected or entered manually on your system. Removable Devices Use this screen to view the removable devices that have been auto-de- tected or entered manually on your system.

  • Page 72: Security Setup

    UPER P3TDLR User's Manual Security Setup Choose "Security Setup" from the AMIBIOS Setup main menu. All Security Setup options are described in this section. The Security Setup screen is shown below. Main Advanced Chipset Supervisor Password User Password > Change Supervisor Password >...

  • Page 73: Change Supervisor Password

    Change Supervisor Password This option allows you to change supervisor password that was entered previously. Change User Password This option allows you to change a user password that was entered previ- ously. Clear User Password Use this option to clear the user password so that it is not required to be entered when the system boots up.

  • Page 74: 4-10 Exit Setup

    UPER P3TDLR User's Manual 4-10 Exit Setup Choose "Exit Setup" from the AMIBIOS Setup main menu. options are described in this section. below. Main Advanced Chipset > Exit Saving Changes > Exit Discarding Changes > Load Optimal Defaults > Load Fail-Safe Defaults >...

  • Page 75: Load Optimal Defaults

    Load Optimal Defaults Highlighting this setting and then pressing <Enter> provides the optimum performance settings for all devices and system features. Load Failsafe Defaults Highlighting this setting and then pressing <Enter> provides the safest set of parameters for the system. cally.
  • Page 76 UPER P3TDLR User's Manual NOTES 4-30...
  • Page 77 Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 78 UPER P3TDLR User’s Manual AMIBIOS Error Beep Codes 1 beep: Refresh failure - the memory refresh circuitry on the motherboard is faulty. (Fatal error) 3 beeps: Base 64KB memory failure - memory failure occurred in the first 64KB of memory. (Fatal error) 6 beeps: Keyboard controller Gate A20 failure.
  • Page 79 If you hear... 5 short and 1 long beeps 6 short and 1 long beeps 7 short and 1 long beeps Appendix A: BIOS Error Beep Codes it's because... no memory detected in system EDO memory detected in system SMBUS (System Management Bus) error...
  • Page 80 UPER P3TDLR User’s Manual Notes...
  • Page 81 Appendix B: AMIBIOS POST Diagnostic Error Messages AMIBIOS POST Diagnostic Error Messages This section describes the power-on self-tests (POST) port 80 codes for the AMIBIOS. Check Point Description Code copying to specific areas is done. to INT 19h boot loader next. NMI is Disabled.
  • Page 82 UPER P3TDLR User’s Manual Check Point Description The keyboard controller command byte is written. Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End>...
  • Page 83 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring the monochrome mode and color mode settings next. Bus initialization system, static, output devices will be done next, if present. Passing control to the video ROM to perform any required configuration before the video ROM test.
  • Page 84 UPER P3TDLR User’s Manual Check Point Description Initializing the bus input, IPL, and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next.
  • Page 85 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
  • Page 86 UPER P3TDLR User’s Manual Check Point Description The DMA page register test passed. DMA Controller 1 base register test next. The DMA controller 1 base register test passed. Performing the DMA controller 2 base register test next. The DMA controller 2 base register test passed.
  • Page 87 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description programming been completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
  • Page 88 UPER P3TDLR User’s Manual Check Point Description Any initialization required after the option ROM test has been completed. printer base address next. Set the timer and printer base addresses. RS-232 base address next. Returned Performing Coprocessor test next. Required initialization before the Coprocessor test is over.
  • Page 89 Appendix B: AMIBIOS POST Diagnostic Error Messages Check Point Description Returned Next, performing the E000 option ROM had control. Initialization completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next. The system configuration is displayed. Uncompressing the DMI data and initializing DMI. Copying any code to specific areas.
  • Page 90 UPER P3TDLR User’s Manual Notes B-10...

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