AXIOMTEK IPC912 Series User Manual page 38

IPC912 Series User's Manual
Adjacent Cache Line Prefetch
This item has a hardware adjacent cache line prefetch
mechanism that automatically fetches extra cache line
whenever the processor requests for a cache line. This
reduces cache latency by making the next cache line
immediately available if the processor requires it as well.
The processor will retrieve the currently requested cache
line and the subsequent cache line when enabled.
The processor will only retrieve the currently requested
cache line when disabled.
Max CPUID Value Limit
You can enable this item to let legacy operating systems
boot even without support for CPUs with extended CPU ID
functions.
Intel (R) Virtualization Tech
Use this feature to enable or disable the Intel Virtualization
Technology (IVT) extensions, which allow multiple
operating systems to run simultaneously on the same
system.
When the IVT extensions are enabled, it allows for
hardware-assisted virtual machine management.
Execute-Disable Bit Capability
This item helps you enable or disable the No-Execution
Page Protection Technology.
Core Multi-Processing
This feature controls the functionality of the Core Multi-
Processing to allow the processor to execute multitasking
function.
Intel (R) SpeedStep (tm) tech
This item helps you enable or disable the Intel SpeedStep
Technology.
Intel (R) C-STATE tech
Use this item to enable or disable the C-State technology.
28
Utility
AMI BIOS