Figure 13. Status Byte Register - Fluke MOLBOX RFM Operation And Maintenance Manual

(ver 1.10 and higher) reference flow monitor
Table of Contents

Advertisement

molbox™ RFM™ OPERATION AND MAINTENANCE MANUAL
status byte register
("∗STB?" or "∗SRE n")
OPERation
Bit7 (128)
RQS/MSS
Bit6 (64)
ESB
Bit5 (32)
MAV
Bit4 (16)
N/A
Bit3 (8)
ERROR
Bit2 (4)
N/A
Bit1 (2)
N/A
Bit0 (1)
The status byte register can be read using the "*STB?" query, or by performing a
serial poll on the IEEE-488 bus. If you read this using a serial poll then Bit 6 is
the RQS. If the "∗STB?" query is used, then Bit 6 is the MSS bit. All of the other
bits are common to both types of query.
Each of these status bits can cause a SRQ to occur. The Service Request
Enable Register ("∗SRE" program message) determines which of these flags are
able to assert the SRQ line. This enable register has a matching set of bits that
each will enable the designated bit to cause a SRQ, except for the RQS/MSS
bit(s) which cannot cause a SRQ. If you set this register to 20 ($14 hex), an
SRQ will occur if the MAV or the ERROR bit are set. The description of these
bits are given as:
© 1998-2007 DH Instruments, a Fluke Company
OPERation summary bit
Standard Event Status Register
PON
URQ
CMD
Bit7
Bit6
Bit5
OUTPUT
QUEUE
ERROR
QUEUE

Figure 13. Status Byte Register

OPER: OPERational event register summary bit (Bit 7)
This bit is not supported by the molbox RFM.
RQS: Requested Service (Bit 6)
Indicates that the SRQ line of the IEEE-488 interface has been asserted by
the molbox RFM. This bit is cleared when a serial poll is performed on the
molbox RFM, and is a part of the status byte register when read using a
serial poll. This bit does not apply if the COM1 port is being used.
MSS: Master Summary Status (Bit 6)
Indicates that an event or events occurred that caused the molbox RFM to
request service from the Host, much like the RQS bit. Unlike the RQS bit, it
is READ ONLY and can be only cleared when the event(s) that caused the
service request are cleared.
ESB: Event Summary Bit (Bit 5)
Indicates if an enabled bit in the Standard Event Status Register became set.
(See Section 4.4.1.2.)
MAV: Message Available Bit (Bit 4)
Indicates that at least one reply message is waiting in the molbox RFM IEEE-
488 output queue.
Page 130
("∗ESR?" or "∗ESE n")
EXE
DDE
Bit4
Bit3
QYE
RQC
OPC
Bit2
Bit1
Bit0

Advertisement

Table of Contents
loading

Table of Contents