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Analog Devices AD9380 Manual page 7

Analog/hdmi dual-display interface

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
GND
GREEN 7
GREEN 6
GREEN 5
GREEN 4
GREEN 3
GREEN 2
GREEN 1
GREEN 0
V
DD
GND
BLUE 7
12
BLUE 6
BLUE 5
BLUE 4
BLUE 3
BLUE 2
BLUE 1
BLUE 0
MCLKIN
MCLKOUT
www.BDTIC.com/ADI
SCLK
LRCLK
2
I
S3
2
I
S2
Table 5. Complete Pinout List
Pin Type
INPUTS
1
PIN 1
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin No.
Mnemonic
79
R
AIN0
77
R
AIN1
74
G
AIN0
71
G
AIN1
68
B
AIN0
B
66
B
AIN1
B
64
HSYNC 0
63
HSYNC 1
61
VSYNC 0
60
VSYNC 1
73
SOGIN 0
70
SOGIN 1
62
EXTCLK
62
COAST
81
PWRDN
AD9380
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Function
Analog Input for Converter R Channel 0
Analog Input for Converter R Channel 1
Analog Input for Converter G Channel 0
Analog Input for Converter G Channel 1
Analog Input for Converter B Channel 0
Analog Input for Converter B Channel 1
Horizontal SYNC Input for Channel 0
Horizontal SYNC Input for Channel 1
Vertical SYNC Input for Channel 0
Vertical SYNC Input for Channel 1
Input for Sync-on-Green Channel 0
Input for Sync-on-Green Channel 1
External Clock Input—Shares Pin with COAST
PLL COAST Signal Input—Shares Pin with EXTCLK
Power-Down Control
Rev. 0 | Page 7 of 60
AD9380
GND
75
G
74
AIN0
73
SOGIN 0
72
V
D
71
G
AIN1
SOGIN 1
70
GND
69
68
B
AIN0
V
67
D
66
B
AIN1
65
GND
64
HSYNC 0
63
HSYNC 1
62
EXTCLK/COAST
61
VSYNC 0
60
VSYNC 1
59
PV
DD
58
GND
57
FILT
56
PV
DD
55
GND
54
PV
DD
53
ALGND
52
PU1
PU2
51
Value
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS

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