Analog Devices Super Sequencer ADM1168 Manual
Analog Devices Super Sequencer ADM1168 Manual

Analog Devices Super Sequencer ADM1168 Manual

Monitor with nonvolatile fault recording

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FEATURES

Complete supervisory and sequencing solution for up to
8 supplies
16 event deep black box nonvolatile fault recording
8 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0% accuracy across all voltages and temperatures
4 selectable input attenuators allow supervision of supplies to
14.4 V on VH
6 V on VP1 to VP3 (VPx)
4 dual-function inputs, VX1 to VX4 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
8 programmable driver outputs, PDO1 to PDO8 (PDOx)
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open-collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
NFET (PDO1 to PDO6 only)
Sequencing engine (SE) implements state machine control of
PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 32-lead, 7 mm × 7 mm LQFP

APPLICATIONS

Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Super Sequencer and Monitor with
Nonvolatile Fault Recording

FUNCTIONAL BLOCK DIAGRAM

ADM1168
DUAL-
VX1
FUNCTION
VX2
INPUTS
VX3
(LOGIC INPUTS
OR
VX4
SFDs)
VP1
PROGRAMMABLE
RESET
VP2
GENERATORS
VP3
(SFDs)
VH
AGND
VDD
VDDCAP
ARBITRATOR

GENERAL DESCRIPTION

The ADM1168 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple supply systems.
The device also provides up to eight programmable inputs for
monitoring undervoltage faults, overvoltage faults, or out-of-window
faults on up to eight supplies. In addition, eight programmable
outputs can be used as logic enables. Six of these programmable
outputs can also provide up to a 12 V output for driving the gate
of an NFET that can be placed in the path of a supply.
The logical core of the device is a sequencing engine. This state
machine-based construction provides up to 63 different states.
This design enables very flexible sequencing of the outputs based
on the condition of the inputs.
A block of nonvolatile EEPROM is available that can be used to
store user-defined information and may also be used to hold a
number of fault records that are written by the sequencing engine
defined by the user when a particular fault or sequence occurs.
The ADM1168 is controlled via configuration data that can be
programmed into an EEPROM. The whole configuration can be
programmed using an intuitive GUI-based software package
provided by Analog Devices, Inc.
For more information about the ADM1168 register map, refer
to the
AN-721 Application
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
ADM1168
REFOUT REFGND
SDA SCL A1
VREF
SMBus
INTERFACE
FAULT RECORDING
EEPROM
CONFIGURABLE
OUTPUT
DRIVERS
(HV CAPABLE OF
DRIVING GATES
OF NFET)
SEQUENCING
ENGINE
CONFIGURABLE
OUTPUT
DRIVERS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
VCCP
GND
Figure 1.
Note.
www.analog.com
©2011 Analog Devices, Inc. All rights reserved.
A0
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
PDOGND

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Summary of Contents for Analog Devices Super Sequencer ADM1168

  • Page 1: Features

    Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
  • Page 2: Table Of Contents

    ADM1168 TABLE OF CONTENTS     Features ....................1 Default Output Configuration..........14     Applications..................1 Sequencing Engine ................. 15     Functional Block Diagram .............. 1 Overview ..................15     General Description ................. 1 Warnings..................15    ...
  • Page 3: Detailed Block Diagram

    ADM1168 DETAILED BLOCK DIAGRAM REFOUT REFGND SDA SCL A1 SMBus VREF INTERFACE ADM1168 DEVICE CONTROLLER EEPROM FAULT RECORDING GPI SIGNAL CONFIGURABLE CONDITIONING OUTPUT DRIVER PDO1 (HV) PDO2 PDO3 PDO4 PDO5 GPI SIGNAL CONFIGURABLE CONDITIONING OUTPUT DRIVER PDO6 SEQUENCING (HV) ENGINE CONFIGURABLE SELECTABLE OUTPUT DRIVER...
  • Page 4: Specifications

    ADM1168 SPECIFICATIONS VH = 3.0 V to 14.4 V , VPx = 3.0 V to 6.0 V = −40°C to +85°C, unless otherwise noted. Table 1. Parameter Unit Test Conditions/Comments POWER SUPPLY ARBITRATION VH, VPx Minimum supply required on one of the VH, VPx pins Maximum VDDCAP = 5.1 V typical 14.4 VDDCAP = 4.75 V...
  • Page 5 ADM1168 Parameter Unit Test Conditions/Comments PROGRAMMABLE DRIVER OUTPUTS High Voltage (Charge Pump) Mode (PDO1 to PDO6) Output Impedance kΩ 12.5 = 0 μA 10.5 13.5 = 1 μA μA 2 V < V < 7 V OUTAVG Standard (Digital Output) Mode (PDO1 to PDO8) (pull-up to VDDCAP or VPx) = 2.7 V, I = 0.5 mA...
  • Page 6: Absolute Maximum Ratings

    ADM1168 ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating θ is specified for the worst-case conditions, that is, a device Voltage on VH Pin 16 V soldered in a circuit board for surface-mount packages. Voltage on VPx Pins Voltage on VXx Pins −0.3 V to +6.5 V Table 3.
  • Page 7: Pin Configuration And Function Descriptions

    ADM1168 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PDO1 PIN 1 PDO2 INDICATOR PDO3 ADM1168 PDO4 PDO5 TOP VIEW (Not to Scale) PDO6 PDO7 PDO8 NC = NO CONNECT. DO NOT CONNECT TO THIS PIN. Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No.
  • Page 8: Typical Performance Characteristics

    ADM1168 TYPICAL PERFORMANCE CHARACTERISTICS Figure 4. V vs. V Figure 7. I vs. V (VP1 Not as Supply) VDDCAP Figure 5. V vs. V Figure 8. I vs. V (VH as Supply) VDDCAP Figure 6. I vs. V (VP1 as Supply) Figure 9.
  • Page 9 ADM1168 VP1 = 5V VP1 = 3V 10.0 12.5 15.0 (µA) (µA) LOAD LOAD Figure 10. Charge-Pumped V (FET Drive Mode) vs. I Figure 12. V (Weak Pull-Up to VPx) vs. I PDO1 LOAD PDO1 LOAD 2.058 2.053 VP1 = 3.0V VP1 = 5V 2.048 VP1 = 3V...
  • Page 10: Powering The Adm1168

    ADM1168 POWERING THE ADM1168 The ADM1168 is powered from the highest voltage input on either When two or more supplies are within 100 mV of each other, the the positive-only supply inputs (VPx) or the high voltage supply supply that first takes control of V keeps control.
  • Page 11: Inputs

    ADM1168 INPUTS SUPPLY SUPERVISION Table 5 lists the upper and lower limits of each available range, the bottom of each range (V ), and the range itself (V The ADM1168 has eight programmable inputs. Four of these are dedicated supply fault detectors (SFDs). These dedicated Table 5.
  • Page 12: Input Comparator Hysteresis

    ADM1168 INPUT COMPARATOR HYSTERESIS The UV and OV comparators shown in Figure 16 are always For example, when the glitch filter timeout is 100 μs, any pulse monitoring VPx. To avoid chatter (multiple transitions when the appearing on the input of the glitch filter block that is less than input is very close to the set threshold level), these comparators 100 μs in duration is prevented from appearing on the output of have digitally programmable hysteresis.
  • Page 13: Supply Supervision With Vxx Inputs

    ADM1168 SUPPLY SUPERVISION WITH VXx INPUTS VXx PINS AS DIGITAL INPUTS The VXx inputs have two functions. They can be used as either As described in the Supply Supervision with VXX Inputs section, supply fault detectors or as digital logic inputs. When selected as the VXx input pins on the ADM1168 have dual functionality.
  • Page 14: Outputs

    ADM1168 OUTPUTS SUPPLY SEQUENCING THROUGH The data driving each of the PDOs can come from one of three sources. The source can be enabled in the PDOxCFG configuration CONFIGURABLE OUTPUT DRIVERS register (see the AN-721 Application Note for details). Supply sequencing is achieved with the ADM1168 using the The data sources are as follows: programmable driver outputs (PDOs) on the device as control signals for supplies.
  • Page 15: Sequencing Engine

    ADM1168 SEQUENCING ENGINE • OVERVIEW It can trigger a write of the black box fault and status registers into the black box section of EEPROM. The ADM1168 SE provides the user with powerful and flexible control of sequencing. The SE implements a state machine control of the PDO outputs with state changes conditional on input MONITOR STATE...
  • Page 16: Sequencing Engine Application Example

    ADM1168 SEQUENCING ENGINE APPLICATION EXAMPLE If a timer delay is specified, the input to the sequence detector must remain in the defined state for the duration of the timer The application in this section demonstrates the operation of delay. If the input changes state during the delay, the timer is reset. the SE.
  • Page 17: Fault And Status Reporting

    ADM1168 Monitoring Fault Detector FAULT AND STATUS REPORTING The monitoring fault detector block is used to detect a failure on an The ADM1168 has a fault latch for recording faults. Two registers, input. The logical function implementing this is a wide OR gate FSTAT1 and FSTAT2, are set aside for this purpose.
  • Page 18: Black Box Writes With No External Supply

    ADM1168 Each fault record contains eight bytes, with each byte taking BLACK BOX WRITES WITH NO EXTERNAL SUPPLY typically about 250 μs to write to EEPROM, for a total write In cases where all the input supplies fail, for example, if the card time of about 2 ms.
  • Page 19: Applications Diagram

    ADM1168 APPLICATIONS DIAGRAM 12V IN 12V OUT 5V IN 5V OUT 3V IN 3V OUT DC-TO-DC1 3.3V OUT ADM1168 PDO1 5V OUT PDO2 3V OUT 3.3V OUT DC-TO-DC2 PDO3 PDO4 1.25V OUT 1.25V OUT PDO5 1.2V OUT 0.9V OUT PWRGD PDO6 SIGNAL VALID PDO7...
  • Page 20: Communicating With The Adm1168

    ADM1168 COMMUNICATING WITH THE ADM1168 CONFIGURATION DOWNLOAD AT POWER-UP Option 1 Update the configuration in real time. The user writes to The configuration of the ADM1168 (undervoltage/overvoltage the RAM across the SMBus, and the configuration is updated thresholds, glitch filter timeouts, and PDO configurations) is immediately.
  • Page 21: Updating The Sequencing Engine

    ADM1168 SMBus POWER-UP DEVICE > 2.5V) CONTROLLER LATCH A LATCH B FUNCTION (OV THRESHOLD ON VP1) EEPROM Figure 24. Configuration Update Flow Diagram The major differences between the EEPROM and other registers UPDATING THE SEQUENCING ENGINE are as follows: SE functions are not updated in the same way as regular •...
  • Page 22: Serial Bus Interface

    Function It may be an instruction telling the slave device to expect a block MANID 0xF4 0x41 Manufacturer ID for Analog Devices write, or it may be a register address that tells the slave where REVID 0xF5 0x02 Silicon revision subsequent data is to be written.
  • Page 23 ADM1168 START BY ACK. BY ACK. BY MASTER SLAVE SLAVE FRAME 1 FRAME 2 SLAVE ADDRESS COMMAND CODE (CONTINUED) (CONTINUED) ACK. BY ACK. BY STOP SLAVE SLAVE FRAME 3 FRAME N MASTER DATA BYTE DATA BYTE Figure 25. General SMBus Write Timing Diagram ACK.
  • Page 24: Smbus Protocols For Ram And Eeprom

    ADM1168 • SMBus PROTOCOLS FOR RAM AND EEPROM To erase a page of EEPROM memory. EEPROM memory can be written to only if it is unprogrammed. Before writing The ADM1168 contains volatile registers (RAM) and nonvolatile to one or more EEPROM memory locations that are already registers (EEPROM).
  • Page 25: Read Operations

    ADM1168 • Unlike some EEPROM devices that limit block writes to within To set up a 2-byte EEPROM address for a subsequent read, a page boundary, there is no limitation on the start address when write, block read, block write, or page erase. In this case, the performing a block write to EEPROM, except when command byte is the high byte of EEPROM Address 0xF8 to EEPROM Address 0xFB.
  • Page 26 ADM1168 Block Read Error Correction In a block read operation, the master device reads a block of data The ADM1168 provides the option of issuing a packet error from a slave device. The start address for a block read must have checking (PEC) byte after a write to the RAM, a write to the been set previously.
  • Page 27: Outline Dimensions

    ADM1168 OUTLINE DIMENSIONS 0.75 1.60 9.00 0.60 BSC SQ 0.45 PIN 1 7.00 BSC SQ TOP VIEW (PINS DOWN) 1.45 0.20 1.40 0.09 1.35 7° 3.5° 0.15 0° SEATING 0.05 0.10 MAX 0.45 PLANE 0.80 COPLANARITY VIEW A 0.37 LEAD PITCH 0.30 COMPLIANT TO JEDEC STANDARDS MS-026-BBA Figure 37.
  • Page 28 ADM1168 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09474-0-4/11(0) Rev. 0 | Page 28 of 28...

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