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Analog Devices ADM1169 Manual
Analog Devices ADM1169 Manual

Analog Devices ADM1169 Manual

Super sequencer with margining control and nonvolatile fault recording

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FEATURES

Complete supervisory and sequencing solution for up to
8 supplies
16-event deep black box nonvolatile fault recording
8 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
<1.0% accuracy across all voltages and temperatures
4 selectable input attenuators allow supervision of supplies to
14.4 V on VH
6 V on VP1 to VP3 (VPx)
4 dual-function inputs, VX1 to VX4 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
8 programmable driver outputs, PDO1 to PDO8 (PDOx)
Open-collector with external pull-up
Push/pull output, driven to VDDCAP or VPx
Open-collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
NFET (PDO1 to PDO6 only)
Sequencing engine (SE) implements state machine control of
PDO outputs
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage margining solution for 4 voltage rails
4 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
Reference input (REFIN) has 2 input options
Driven directly from 2.048 V (±0.25%) REFOUT pin
More accurate external reference for improved ADC
performance
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 32-lead, 7 mm × 7 mm LQFP and 40-lead,
6 mm × 6 mm LFCSP packages
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Super Sequencer with Margining Control
and Nonvolatile Fault Recording

APPLICATIONS

Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
AGND

GENERAL DESCRIPTION

The ADM1169 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple supply systems. In addition
to these functions, the ADM1169 integrates a 12-bit ADC and
four 8-bit voltage output DACs. These circuits can be used to
implement a closed-loop margining system that enables supply
adjustment by altering either the feedback node or reference of
a dc-to-dc converter using the DAC outputs.
Supply margining can be performed with a minimum of external
components. The margining loop can be used for in-circuit
testing of a board during production (for example, to verify
board functionality at −5% of nominal supplies), or it can be
used dynamically to accurately control the output voltage of
a dc-to-dc converter.
For more information about the ADM1169 register map, refer
to the
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113

FUNCTIONAL BLOCK DIAGRAM

REFIN
REFOUT REFGND
ADM1169
VREF
12-BIT
SAR ADC
CLOSED-LOOP
MARGINING SYSTEM
DUAL-
FUNCTION
INPUTS
(LOGIC INPUTS
OR
SFDs)
SEQUENCING
ENGINE
PROGRAMMABLE
RESET
GENERATORS
(SFDs)
V
V
V
V
OUT
OUT
OUT
OUT
DAC
DAC
DAC
DAC
DAC1
DAC2
DAC3
DAC4
Figure 1.
AN-721 Application
Note.
©2011 Analog Devices, Inc. All rights reserved.
ADM1169
SDA SCL A1
A0
SMBus
INTERFACE
FAULT
EEPROM
RECORDING
PDO1
CONFIGURABLE
OUTPUT
PDO2
DRIVERS
PDO3
PDO4
(HV CAPABLE OF
PDO5
DRIVING GATES
OF NFET)
PDO6
CONFIGURABLE
OUTPUT
DRIVERS
PDO7
(LV CAPABLE
PDO8
OF DRIVING
LOGIC SIGNALS)
PDOGND
VDD
VDDCAP
ARBITRATOR
VCCP
GND
www.analog.com

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Summary of Contents for Analog Devices ADM1169

  • Page 1: Features

    Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
  • Page 2: Table Of Contents

    Writing to the DACs ..............24     Typical Performance Characteristics ........... 10 Choosing the Size of the Attenuation Resistor....... 24     Powering the ADM1169 ..............13 DAC Limiting and Other Safety Features ....... 24     Inputs....................14 Applications Diagram ..............25  ...
  • Page 3: Detailed Block Diagram

    12 V output The ADM1169 is controlled via configuration data that can be for driving the gate of an NFET that can be placed in the path of programmed into an EEPROM.
  • Page 4: Specifications

    ADM1169 SPECIFICATIONS VH = 3.0 V to 14.4 V, VPx = 3.0 V to 6.0 V, = −40°C to +85°C, unless otherwise noted. Table 1. Parameter Unit Test Conditions/Comments POWER SUPPLY ARBITRATION VH, VPx Minimum supply required on one of VH, VPx Maximum VDDCAP = 5.1 V, typical...
  • Page 5 ADM1169 Parameter Unit Test Conditions/Comments ANALOG-TO-DIGITAL CONVERTER Signal Range The ADC can convert signals presented to the REFIN VH, VPx, and VXx pins; VPx and VH input signals are attenuated depending on the selected range; a signal at the pin corresponding to the selected range is from 0.573 V to 1.375 V at the...
  • Page 6 ADM1169 Parameter Unit Test Conditions/Comments PROGRAMMABLE DRIVER OUTPUTS High Voltage (Charge Pump) Mode (PDO1 to PDO6) Output Impedance kΩ 12.5 = 0 μA 10.5 13.5 = 1 μA μA 2 V < V < 7 V OUTAVG Standard (Digital Output) Mode (PDO1 to PDO8) (pull-up to VDDCAP or VPx) = 2.7 V, I...
  • Page 7: Absolute Maximum Ratings

    ADM1169 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. θ is specified for the worst-case conditions, that is, a device Parameter Rating soldered in a circuit board for surface-mount packages. Voltage on VH Pin 16 V Voltage on VPx Pins Table 3. Thermal Resistance Voltage on VXx Pins −0.3 V to +6.5 V...
  • Page 8: Pin Configurations And Function Descriptions

    ADM1169 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PDO1 PIN 1 PDO2 INDICATOR PIN 1 PDO1 INDICATOR PDO3 PDO2 PDO3 ADM1169 PDO4 PDO4 ADM1169 PDO5 PDO5 TOP VIEW TOP VIEW PDO6 (Not to Scale) PDO6 PDO7 (Not to Scale) PDO7 PDO8 PDO8 NOTES 1.
  • Page 9 ADM1169 Pin No. Mnemonic Description LQFP LFCSP VDDCAP Device Supply Voltage. Linearly regulated from the highest of the VPx and VH pins to a typical of 4.75 V. Note that a capacitor must be connected between this pin and GND. A 10 μF capacitor is recommended for this purpose.
  • Page 10: Typical Performance Characteristics

    ADM1169 TYPICAL PERFORMANCE CHARACTERISTICS Figure 5. V vs. V Figure 8. I vs. V (VP1 Not as Supply) VDDCAP Figure 6. V vs. V Figure 9. I vs. V (VH as Supply) VDDCAP Figure 7. I vs. V (VP1 as Supply) Figure 10.
  • Page 11 ADM1169 –0.2 –0.4 –0.6 –0.8 –1.0 10.0 12.5 15.0 1000 2000 3000 4000 CODE (µA) LOAD Figure 11. Charge-Pumped V (FET Drive Mode) vs. I Figure 14. DNL for ADC PDO1 LOAD VP1 = 5V VP1 = 3V –0.2 –0.4 –0.6...
  • Page 12 ADM1169 1.005 1.004 1.003 1.002 1.001 VP1 = 3.0V 1.000 20kΩ BUFFER PROBE VP1 = 4.75V OUTPUT POINT 47pF 0.999 0.998 0.997 0.996 200mV M1.00µs 756mV 0.995 –40 –20 TEMPERATURE (°C) Figure 19. DAC Output vs. Temperature Figure 17. Transient Response of DAC Code Change into Typical Load 2.058...
  • Page 13: Powering The Adm1169

    There is minimal switching loss with this architecture (~0.2 V), resulting in the ability to power 4.75V the ADM1169 from a supply as low as 3.0 V. Note that the supply on the VXx pins cannot be used to power the device. 4.75V An external capacitor to GND is required to decouple the on-chip supply from noise.
  • Page 14: Inputs

    PROGRAMMING THE SUPPLY FAULT DETECTORS is the voltage range. N is the decimal value of the 8-bit code. The ADM1169 can have up to eight SFDs on its eight input is the bottom of the range. channels. These highly programmable reset generators enable the supervision of up to eight supply voltages.
  • Page 15: Input Comparator Hysteresis

    ADM1169 INPUT COMPARATOR HYSTERESIS For example, when the glitch filter timeout is 100 μs, any pulse appearing on the input of the glitch filter block that is less than The UV and OV comparators shown in Figure 23 are always 100 μs in duration is prevented from appearing on the output of...
  • Page 16: Supply Supervision With Vxx Inputs

    The second function is as a digital logic input to the device. similar to the VH and VPx pins. The primary difference is that the Therefore, the ADM1169 can be configured for up to four digital VXx pins have only one input range: 0.573 V to 1.375 V. Therefore, inputs.
  • Page 17: Outputs

    GND by a weak (20 kΩ), on-chip, pull-down resistor. to provide a PWRGD signal when all the SFDs are in tolerance As the input supply to the ADM1169 ramps up on VPx or VH, or a RESET output if one of the SFDs goes out of specification...
  • Page 18: Sequencing Engine

    ADM1169 SEQUENCING ENGINE OVERVIEW MONITOR The ADM1169 SE provides the user with powerful and flexible STATE FAULT TIMEOUT control of sequencing. The SE implements a state machine control of the PDO outputs, with state changes conditional on input events. SE programs can enable complex control of boards such...
  • Page 19: Sequencing Engine Application Example

    ADM1169 SEQUENCING ENGINE APPLICATION EXAMPLE If a timer delay is specified, the input to the sequence detector must remain in the defined state for the duration of the timer The application in this section demonstrates the operation of delay. If the input changes state during the delay, the timer is reset.
  • Page 20: Fault And Status Reporting

    EEPROM. The fault record provides a snapshot of In the sample application shown in Figure 28, the timeout next- the entire ADM1169 state at the point in time when the last state state transition is from the EN3V3 and EN2V5 states. For the...
  • Page 21: Black Box Writes With No External Supply

    ADM1169 is powered using a 12 V supply on the VH pin, then the flag bit is 1. The first fault record is stored at Address 0xF980,...
  • Page 22: Voltage Readback

    ADM1169 VOLTAGE READBACK The ADM1169 has an on-board, 12-bit, accurate ADC for voltage Table 9. ADC Input Voltage Ranges readback over the SMBus. The ADC has an 8-channel analog SFD Input ADC Input mux on the front end. The eight channels consist of the eight...
  • Page 23: Supply Margining

    10%. The ADM1169 can be commanded to margin a supply up or OPEN-LOOP SUPPLY MARGINING down over the SMBus by updating the values on the relevant The simplest method of margining a supply is to implement an DAC output.
  • Page 24: Writing To The Dacs

    ADM1169 To implement closed-loop margining, CHOOSING THE SIZE OF THE ATTENUATION RESISTOR Disable the four DACx outputs. Set the DAC output voltage equal to the voltage on the The size of the attenuation resistor, R3, determines how much feedback node.
  • Page 25: Applications Diagram

    ADM1169 APPLICATIONS DIAGRAM 12V IN 12V OUT 5V IN 5V OUT 3V IN 3V OUT DC-TO-DC1 3.3V OUT ADM1169 PDO1 PDO2 5V OUT 3V OUT 3.3V OUT DC-TO-DC2 PDO3 PDO4 1.25V OUT 1.25V OUT PDO5 1.2V OUT 0.9V OUT PWRGD...
  • Page 26: Communicating With The Adm1169

    ADM1169 to its original configuration. completing the configuration download. The topology of the ADM1169 makes this type of operation possible. At 0.5 ms after the configuration download completes, the The local, volatile registers (RAM) are all double-buffered latches.
  • Page 27: Updating The Sequencing Engine

    Page 7, from Address 0xF8A0 to Address 0xF8FF, are reserved. Page 8 to Page 11 are available for customer use to store any The ADM1169 contains a large number of data registers. The principal registers are the address pointer register and the information that may be required by the customer in their application.
  • Page 28: Serial Bus Interface

    Identifying the ADM1169 on the SMBus The peripheral whose address corresponds to the transmitted The ADM1169 has a 7-bit serial bus slave address (see Table 11). address responds by pulling the data line low during the low period The device is powered up with a default serial bus address. The before the ninth clock pulse, known as the acknowledge bit, and five MSBs of the address are set to 10011;...
  • Page 29: Smbus Protocols For Ram And Eeprom

    SMBus PROTOCOLS FOR RAM AND EEPROM programmed location, the location contents must first be erased. The ADM1169 contains volatile registers (RAM) and nonvolatile EEPROM erasure cannot be done at the byte level. The EEPROM registers (EEPROM). User RAM occupies Address 0x00 to is arranged as 32 pages of 32 bytes each, and an entire page must Address 0xDF;...
  • Page 30: Write Operations

    • In the ADM1169, the send byte protocol is used for the following To write a single byte of data to the RAM. In this case, the two purposes: command byte is RAM Address 0x00 to RAM Address 0xDF, and the only data byte is the actual data, as shown in Figure 41.
  • Page 31: Read Operations

    Figure 45. The start address low and extends the clock pulse when it cannot accept any for a block write must have been set previously. In the ADM1169, more data. a send byte operation sets a RAM address, and a write byte/word...
  • Page 32 The start address for a block read must checking (PEC) byte after a write to the RAM, a write to the have been set previously. In the ADM1169, this is done by a EEPROM, a block write to the RAM/EEPROM, or a block read send byte operation to set a RAM address, or a write byte/word from the RAM/EEPROM.
  • Page 33: Outline Dimensions

    ADM1169 OUTLINE DIMENSIONS 0.75 1.60 9.00 0.60 BSC SQ 0.45 PIN 1 7.00 BSC SQ TOP VIEW (PINS DOWN) 1.45 0.20 1.40 0.09 1.35 7° 3.5° 0.15 0° SEATING 0.05 0.10 MAX 0.45 PLANE 0.80 COPLANARITY VIEW A 0.37 LEAD PITCH 0.30...
  • Page 34 ADM1169 NOTES Rev. 0 | Page 34 of 36...
  • Page 35 ADM1169 NOTES Rev. 0 | Page 35 of 36...
  • Page 36 ADM1169 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09475-0-4/11(0) Rev. 0 | Page 36 of 36...