76
Module
Connector A
78
Figure 10: Digital I/O Connectivity
4.20
Battery Holder ﴾J2101﴿
A 3 V lithium battery ﴾CR1220﴿ can be installed for buffering the real‐time clock on the connected Mer‐
cury FPGA/SoC module. The battery is not included. Used batteries should be disposed of according to
the manufacturer's instructions.
Alternatively, the VCC_BAT_IN power signal can be driven via pin 6 of connector J2001. Refer to Sec‐
tion
4.22
for details.
Table
21
shows the characteristics of the battery holder used on the Mercury+ PE3 base board.
Part Number
BC501SM
Table 21: J2101 ‐ Battery Holder Characteristics
CAUTION
Explosion due to incompatible battery
4.21
JTAG Connector ﴾J2003﴿
The JTAG routing depends on the presence of a FMC Mezzanine card. If a FMC card is mounted on the
Mercury+ PE3 base board, the JTAG is routed through the mounted FPGA/SoC module and the FMC card.
Otherwise, the JTAG loop includes only the FPGA/SoC module.
Figure
11
describes the routing of the JTAG signals.
D‐0000‐420‐001
Use a battery type recommended by Enclustra.
DII
User LEDs
DIO
DII (Digital
Input)
DIO (Digital
Output)
Manufacturer
Memory Protection Devices
30 /
63
Version 03, 11.07.2024
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