HMS Networks Intesis IN485FGL001I000 User Manual page 69

Modbus Registers
Register Name
RUNTIME_MODE_RESTRICTIONS_MAP
Table 20. MODE_MAP bit characterization
Bit 15 Bit 04
1: Invalid COOL
0: Valid
Table 21. FAN_MAP bit characterization
Bit 15 Bit 10 Bit 05
STOP SPEED 5
1: Invalid
0: Valid
Table 22. VANES_MAP bit characterization
Bit 15 Bit 03
1: Invalid PULSE L/R PULSE U/D
0: Valid
Table 23. U_D_VANES_MAP bit characterization
Bit 15 Bit 10 Bit 09 Bit 08
SWING POS_9 POS_8
1: Invalid
0: Valid
Table 24. L_R_VANES_MAP bit characterization
Bit 15 Bit 10 Bit 05
SWING POS_5
1: Invalid
0: Valid
Table 25. RUNTIME_MODE_RESTRICTIONS_MAP bit characterization
Bit 15 Bit 04
1: Invalid COOL
0: Valid
USER MANUAL Version 1.0.9
Possible values
Indicates the available states of the signal. Each bit in the
register has its own meaning. See the table below.
Bit 03 Bit 02 Bit 01
FAN DRY HEAT
1: Enabled
0: Disabled
Bit 04 Bit 03 Bit 02
SPEED 4 SPEED 3 SPEED 2
1: Enabled
0: Disabled
Bit 02 Bit 01
SPECIFIC L/R SPECIFIC U/D
1: Enabled
0: Disabled
Bit 07 Bit 06 Bit 05 Bit 04
POS_7 POS_6 POS_5 POS_4
1: Enabled
0: Disabled
Bit 04 Bit 03 Bit 02
POS_4 POS_3 POS_2
1: Enabled
0: Disabled
Bit 03 Bit 02 Bit 01
FAN DRY HEAT
1: Not writable
0: Writable
Bit 00
AUTO
Bit 01 Bit 00
SPEED 1 AUTO
Bit 00
Bit 03 Bit 02 Bit 01 Bit 00
AUTO/
POS_3 POS_2 POS_1
Bit 01 Bit 00
POS_1 AUTO/OFF
Bit 00
AUTO
IN485FGL001I000 Gateway
Modbus PLC
address address
R/W
(base 0) (base 1)
2012 2013 R
OFF
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