Detailed Circuit Description; Vertical Altenuators - Tektronix 2235A Instruction Manual

Theory of Operation
-2235A
Instruction
DETAILED CIRCUIT DESCRIPTION
VERTICAL ATTENUATORS
path, attenuators AT1 and AT2 attenuate the input signal
by factors of 100 and 10 respectively. When S1 is set to
The Channel 1 and Channel 2 Attenuator circuits, shown
GND, the direct signal path is opened and the input ofthe
on Diagram 1, are identical with the exception of the
Buffer Amplifier is connected to ground. This provides a
additional Invert circuitry in the Channel 2 paraphase
ground reference without the need to disconnect the
Amplifier. Therefore, only the Channel 1 Attenuator will
applied signal from the input CO~nector. The coupling
be described and the Invert circuitry of Channel 2 will be
capacitor Precharges through R2 to Prevent large trace
discussed separately.
shifts when switching from GND to AC.
The Attenuator circuit (see Figure 3-1) provides control
of input coupling, vertical deflection factor, and variable
Buffer Amplifier and Gain Switching Network
volts-per-division gain. lnput signals for crt vertical
deflection may be connected to the CH 1 and the CH
The Buffer Amplifier presents a high-impedance , low-
input connectors. In the X-Y mode of operation, the sig-
capacitance load to the signal from the High-
rial applied the CH OR provides hOri- Impedance Attenuator and a low output impedance to
zontal (X-Axis) deflection for the display, and the signal
the Gain Switching Network. A dual-path amplifier is
applied to the CH 2 OR Y connector provides the vertical
used to combine high-dc stability with high-speed
(Y-Axis) deflection for the display.
performance.
lnput Coupling
The signal applied to the CH 1 input connector can be ac
coupled, dc coupled, or disconnected from the input of
the High Impedance lnput Attenuator circuit. Signals
applied to the CH 1 input connector are routed through
resistor R1 to lnput Coupling switch S1. When S1 is set
for dc coupling, the Channel 1 signal is applied directly
to the input of the High-Impedance Attenuator stage.
When ac coupled, the input signal passes through dc-
blocking capacitor C2. The blocking capacitor prevents
the dc component of the input signal from being applied
to the Attenuator circuit. When switched into the signal
In the slow path, the input signal is applied to both the
gate of source-follower Q13 and the invertirlg input of
U10 through the divider network composed of R3 and
R5. Transistor Q13 and emitter-follower Q18 isolate the
input signal from the loading of the Gain Switching Net-
work. The divider network at the output of the amplifier
(R46, R47, and R48) is connected to the other input of
U10. Amplifier U10 compares the two divider voltages
and changes the conduction level of current-source
transistor Q15 to correct for any error at the source of
Q13. Capacitor C10 limits the bandwidth of U 10 so that
the slow path responds only to frequencies below
100 kHz.
FROM
VERTICAL INPUT
COUPLINO
Figure 3-1. Block diagram of the Vertical Attenuators.
TO
VERTICAL
PREAMP
-
Scans by
ARTEK
MEDL4
=>
7683-23
HIGH-Z
ATTENUATOR
-1, -10.
-100
A
-
*
1
7
BUFFER AMPL
FASTPATH
Q13.Ql8
BUFFER AMPL
SLOW PATH
015, U10
GAIN
SWITCHINO
-
NETWORK
-1, -2.
-4.
-10
d
4
FREQUENCY
GAIN BALANCE
R47