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PROGRAMMING INFORMATION
Table 2-5:
CRTC Internal Registers (continued)
+· - -+- - .. - .. - . - - .. - . - ..... - . ·+- ... - .. - ... - ..... - .... - - .... - - ... ·+
IREGI NAME
I
DESCRIPTION
I
+·. -+· - - .... - - ... - - - .. - .. - - . -+·. - ........... - ... - - - . - . - . - - - - - .. ·+
08
Mode
Controls
addressing,
interlace,
and cursor.
09
Maximum Scan Line
The number
of
scan "lines
in
a
character row, minus l.
10
Cursor Scan Start
Defines the scan line at which the
cursor starts.
11
12
13
14
15
16
17
Cursor Scan End
Start Address High
Start Address Low
Cursor Address High
Cursor Address Low
Light Pen Position High
Light Pen Position Low
Defines where the cursor ends.
Defines the RAM location where
video refresh begins.
Defines the cursor position in
RAM.
Contains the position of the
light pen.
+···+························+······-········-··················+
2.1.4.2
bits
of
addressed
(above).
15
CRTC Data Register · This register
contains
the
eight
data
to
be
loaded
into
the
internal CRTC register
by bits <04:00> of the CRTC
Address
Pointer
Register
08
07
00
+. - . - - ... - ••. - .........••..•••• ·+·. - ........... - . - - ... - - - - .. - . - ·+
not used
DATA
+· ...... - - - ......•....• - ....•.. ·+· ..... - ...... - ... - . . . . . . . . . . . . ·+
ADDRESS
=
CSR BASE
+
10
Figure 2·5:
CRTC Data Register Format
Table 2·7:
CRTC Data Register Bits
+- ...... ·+· ..•... ·+·. - .. - - ... - .. - - ... - .... - ............. - ...... ·+
BITS
ACCESS
DESCRIPTION
+········+········+·································-·····-···-·+
<15:08>
(not used)
<07:08>
RD/WR
CRTC internal register data
+········+········+································--·-········-+
2-6
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