Input, Output Voltages, And Load Current Requirements; Jumpers And Connectors; Table 2-1. Input And Output Voltages, And Load Current Requirements; Table 3-1. Terminal Blocks - Texas Instruments LP87725Q1EVM User Manual

Input, Output Voltages, and Load Current Requirements

2 Input, Output Voltages, and Load Current Requirements
LP87725-Q1 device works with 3.3 V input supply and supply is internally monitored for undervoltage (UV) and
overvoltage (OV) conditions, therefore, keep the input supply voltage within 3.3 V +/- 8 % to avoid input supply
UV/OV detection. Input power plane to the PMIC has option for additional filtering using L1 and L2 on the bottom
side of the PCB.
• If the VBAT/preregulator path is used (default configuration), then the input supply to the device is already
regulated to 3.3 V.
• If an external 3.3 V supply is used, then verify that input supply voltage is always within the recommended
voltage range and drop across supply path must be considered.
• If the EVM is configured to work with USB supply, then regulators must not be loaded.
Table 2-1 lists the input and output voltage for each regulator and the maximum load current requirements. Refer
to LP87725-Q1 device data sheet for more information about device electrical characteristics and the features.

Table 2-1. Input and Output Voltages, and Load Current Requirements

Regulator Name
BUCK1
BUCK2
BUCK3
LDO_LS1
LS2
If all the regulators are loaded with maximum load current simultaneously, then PMIC and PCB can become hot.
Make sure that PMIC junction temperature does not exceed 150 °C.

3 Jumpers and Connectors

LP87725Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users to
verify the EVM according to their application conditions. However, the EVM is pre-configured with default jumper
settings and users can power-up the regulators without the need of jumper modifications. Setting these jumpers
correctly for the correct function of the EVM is important.
Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of
test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper
functionality, see the schematic diagrams in
Terminal Block Number
4 LP87725Q1EVM Evaluation Module
Input Supply Voltage at PMIC Supply Pin
3.04 V - 3.56 V
3.04 V - 3.56 V
3.04 V - 3.56 V
3.04 V - 3.56 V
3.10 V - 3.49 V
Section 6.1.

Table 3-1. Terminal Blocks

Terminal Block Name
J1
J17 VOUT_LDO_LS1
J18 VOUT_LS2
J24
J25
J26
J30
J33
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Output Voltage
1.8 V
1.0 V
1.2 V
1 V
3.3 V
Table 3-1 lists all the terminal blocks on the EVM and
VIN 3.3 V 3.3 V External Input Voltage
Terminal block for LDO, LS1
Output
Terminal block for LS2 Output
BUCK1 Terminal block for BUCK1 Output
BUCK3 Terminal block for BUCK3 Output
BUCK2 Terminal block for BUCK2 Output
J30 USB Connector
VBAT 5 V - 20 V Input
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Maximum Load Current
3 A
3 A
3 A
0.4 A
0.4 A
Description
SNVU851 – NOVEMBER 2023
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