Fll And Pll Configuration; Setting The Fll; Overview; Use Case - Infineon XMC7000 Manual

Clock configuration setup in XMC7000 MCU family

FLL and PLL configuration

4 FLL and PLL configuration
This section shows the configuration of FLL and PLL in the clock system.
4.1

Setting the FLL

4.1.1

Overview

The FLL must be configured before it is used. The FLL has a current-controlled oscillator (CCO); the output
frequency of this CCO is controlled by adjusting the trim of the CCO.
4.1.2

Use case

Input clock frequency
Output clock frequency
You can configure these parameters in the System tab of the Device Configurator; based on these,
ModusToolbox™ software automatically generates the corresponding code.
1. In the Device Configurator, select PATH_MUX0.
2. On the PATH_MUX Parameters pane, select ECO (16 MHz) as the source clock.
Figure 17 Setting ECO (16 MHz) as the source clock
Application note
16 MHz
100 MHz
18 002-34253 Rev. *C
2023-11-08