Internal Clock Configuration; Configuring Clk_Pathx - Infineon XMC7000 Manual

Clock configuration setup in XMC7000 MCU family

Internal clock configuration

5 Internal clock configuration
5.1

Configuring CLK_PATHx

CLK_PATHx is used as the input source for root clocks CLK_HFx. CLK_PATHx can select all clock resources
including the FLL and PLL using DSI_MUX and PATH_MUX. CLK_PATH5 cannot select the FLL and PLL, but other
clock resources can be selected.
Figure 27 shows the generation diagram for CLK_PATHx.
EXT_CLK
ILO0
ILO1
WCO
EXT_CLK
ILO0
ILO1
WCO
EXT_CLK
ILO0
ILO1
WCO
EXT_CLK
ILO0
ILO1
WCO
Figure 27 Generating CLK_PATHx
Application note
ECO
IMO
PATH_MUX
DSI_MUX
ECO
IMO
PATH_MUX
DSI_MUX
ECO
IMO
PATH_MUX
DSI_MUX
ECO
IMO
PATH_MUX
DSI_MUX
FLL
BYPASS_SEL
PLL400
#0/#1
BYPASS_SEL
PLL200
#0/#1
BYPASS_SEL
24
CLK_PATH0
CLK_PATH1/CLK_PATH2
CLK_PATH3/CLK_PATH4
CLK_PATH5
002-34253 Rev. *C
2023-11-08