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3.2 Polling
Cells are input to the µ PD98410 in the following sequence:
The µ PD98410 inquires whether a PHY device has a cell (polling).
<1>
If the device has a cell, the µ PD98410 inputs the cell. If not, the µ PD98410 makes an inquiry to the next
<2>
PHY device of those that are mapped to the logical port by the port configuration register.
Cells are output from the output queue in the following sequence:
The µ PD98410 inquires whether each PHY device is ready to receive a cell (polling).
<1>
Based on output rate control (shaping), cell stop information, and the result of polling in <1>, the µ PD98410
<2>
determines from which output port to output a cell.
Of the output queues corresponding to the logical output port determined, the µ PD98410 determines the
<3>
service class of the queue used to output the cell (WFQ (Weighted Fairness Queue)).
The way in which polling is used to input or output cells is explained below.
3.2.1 Outline of polling
Figure 3-3 shows the related functional blocks of the µ PD98410.
PHY
PHY
PHY
• UP0-UP3
: UTOPIA interface ports
• I/O-Polling Control : Polling control block for input and output sides
• I/O-FIFO
: Input or output FIFO. A FIFO exists for each UTOPIA port and corresponds to UP0 to
UP3.
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CHAPTER 3 FUNCTIONAL OUTLINE
Figure 3-3. Functional Blocks of µ µ µ µ PD98410
Input side
UP0
I-Poling
UP1
Control
&
I-FIFO
UP2
UP3
Output side
PHY
PHY
UP0
PHY
O-Poling
UP1
Control
&
I-FIFO
UP2
UP3
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