Table of Contents
Advertisement
Symbol
Pin No.
TXADDR23 -
215, 335, 89, 216
TXADDR20
TXDATA27 -
447, 337, 218, 448, 92, 219,
TXDATA20
449, 93
TXSOC2
336
TXENB2_B
217
TXCLAV2
90
TXADDR33 -
144, 268, 13, 383
TXADDR30
TXDATA37 -
270, 146, 385, 148, 147, 16,
TXDATA30
18, 17
TXSOC3
269
TXENB3_B
14
TXCLAV3
145
CHAPTER 2 PIN FUNCTIONS
Table 2-2. Transmit Interface Signal (2/2)
I/O
O
Multi-PHY select address of transmit interface 2.
TXADDR23 is the MSB.
O
Cell data output of transmit interface 2.
Cell data is output to a PHY layer device in byte units. The
µ PD98410 outputs the data at the rising edge of UCLK2.
TXDATA27 is the MSB.
(3-state buffer)
O
Cell transfer start signal of transmit interface 2.
This signal is output to a PHY layer device in synchronization with
the first byte of cell data.
(3-state buffer)
O
Transfer enable signal of transmit interface 2.
This signal informs a PHY layer device that the µ PD98410 outputs
data in the current clock cycle.
I
Cell transfer enable signal of transmit interface 2.
This pin inputs a signal that indicates that the µ PD98410 is ready
to receive the next cell after transfer of the current cell is
completed.
O
Multi-PHY select address of transmit interface 3.
TXADDR33 is the MSB.
O
Cell data output of transmit interface 3.
Cell data is output to a PHY layer device in byte units. The
µ PD98410 outputs the data at the rising edge of UCLK3.
TXDATA37 is the MSB.
(3-state buffer)
O
Cell transfer start signal of transmit interface 3.
This signal is output to a PHY layer device in synchronization with
the first byte of cell data.
(3-state buffer)
O
Transfer enable signal of transmit interface 3.
This signal informs a PHY layer device that the µ PD98410 outputs
data in the current clock cycle.
I
Cell transfer enable signal of transmit interface 3.
This pin inputs a signal that indicates that the µ PD98410 is ready
to receive the next cell after transfer of the current cell is
completed.
Function
31
Advertisement
Table of Contents
