NEC mPD98410 User Manual page 100

1.2g atm switch lsi
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(a) Successive output mode & multi-PHY mode (NEC's 155M bps " µ µ µ µ PD98404")
In this mode, the maximum transfer rate per PHY device is equivalent to the transfer rate of the UTOPIA
interface. However, because polling is performed at a timing different from that of the UTOPIA Level2
interface, only a PHY device with the timing matching this timing can be connected. The successive output
mode is valid even if a PHY device in the non-successive output mode (a PHY device of the other maker)
exists on the same UTOPIA interface.
If the successive mode (PT register RP = "1") and multi-PHY mode are set, the µ PD98410 polls the PHY
device that is transferring a cell to determine whether the device can receive the next cell when P19
(payload 19) is transferred. Because NEC's 155M bps PHY " µ PD98404" has a mode in which the correct
result is returned in response to this polling, it can successively output cells to the µ PD98410.
Do not set the PHY devices of the other manufacturers in the successive output mode because cell loss may
occur on the UTOPIA interface. Setting the successive output mode is different from setting of peak rate
shaping.
Select
(n: 3-0)
UCLKn
TxADDRn
Fh Fh 3h Fh 4h Fh 5h Fh
TxCLAVn
TxENBn_B
TxSOCn
TxDATAn
P47 P48
H1 H2
When setting the successive output mode, it is all right to set the multi-PHY mode even when only one PHY
device is connected. If the single PHY mode is set, polling is performed in the single PHY mode.
If two or more PHY devices are connected to the same UTOPIA interface, the µ PD98410 cannot reflect the
result of polling that is carried out when P45 (payload 45) is transferred to the PHY device that is transferring
a cell on the next cell transfer. By performing polling when P19 is transferred, however, output is arbitrated
based on the result of the polling, the overhead to read the cell buffer is absorbed, and successive output is
carried out.
100
CHAPTER 3 FUNCTIONAL OUTLINE
Figure 3-44. Polling Timing (a)
Polling
transfer port
6h
Fh
3h
H3 H4 H5
P1 P2
P19 P20 P21 P22
Polling
Fh Fh Fh
Fh
Fh Fh Fh Fh Fh
P43 P44 P45 P46 P47 P48
Output arbitration and overhead of
the buffer reading
Select
3h
Fh
4h
H1 H2

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