Class Priority Control Register - NEC mPD98410 User Manual

1.2g atm switch lsi
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4.3.33 Class priority control register

Register name
Address
PC0-PC23
Note
31
30
29
15
14
13
Note 0180h, 0184h, 0188h, 018Ch, 0190h, 0194h, 0198h, 019Ch, 01A0h, 01A4h, 01A8h, 01ACh, 01B0h,
01B4h, 01B8h, 01BC0h, 01C0h, 01C4h, 01C8h, 01CCh, 01D0h, 01D4h, 01D8h, 01DCh
These registers specify class priority control for each logical output port. For CBR + rtVBR class and RM +
nrtVBR class, the number of cells enabled to be transmitted during the period specified by the PERIOD register is
specified. For ABR class and UBR class, the transmission ratio is set to ABR:UBR.
Field
Bit
CBR
bit [6:0]
VBR
bit [14:8]
ABR
bit [18:16]
UBR
bit [26:24]
CHAPTER 4 INTERNAL REGISTERS
Default
xxxx_x000_xxxx_x001_x000_0001_x000_0001
28
27
26
25
24
UBR
12
11
10
9
8
VBR
R/W
R/W
00h to 7Fh: Number of CBR + rtVBR cells enabled to be
transmitted during PERIOD period.
R/W
00h to 7Fh: Number of RM + nrtVBR cells enabled to be
transmitted during PERIOD period.
R/W
0h to 7h: Cell transmission ratio of ABR class (ratio is ABR:UBR)
R/W
0h to 7h: Cell transmission ratio of UBR class (ratio is UBR:ABR)
R/W
R/W
23
22
21
20
19
7
6
5
4
3
CBR
Function
18
17
16
ABR
2
1
0
Default Value
01h
01h
1h
0h
169

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