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Remarks 1. OQthCBR and OQthRVR are the threshold values for the same output queue.
2. OQthRM and OQthNVR are the threshold values for the same output queue.
3. For cells in ABR and UBR classes for which EPD is disabled, OQthAEP and OQthUEP are the
upper-limit threshold values.
4.3.26 Output queue EPD threshold value registers (00A2h, 00B2h)
Register name
Address
OQthAEP
00A2h
OQthUEP
00B2h
15
14
13
These registers set the EPD threshold value of each logical output port in each class. If a cell in each class is
congested in the output queue, exceeding the corresponding threshold value, an EPD control operation is performed,
and the following processing is executed:
• EPD valid cell : Cells belonging to the newly received packet are discarded. The last cell (EOP) of the
packet is received, however.
• EPD invalid cell : The cell is discarded.
Field
Bit
OQthAEP
bit [12:7]
OQthUEP
bit [15:7]
CHAPTER 4 INTERNAL REGISTERS
Default
xxx0_0000_0xxx_xxxx
0000_0000_0xxx_xxxx
12
11
10
9
8
OQthAEP
OQthUEP
R/W
R/W
0_0000_0 to 1_1111_1: EPD threshold value in ABR class
R/W
0000_0000_0 to 1111_1111_1: EPD threshold value in UBR class
R/W
R/W
R/W
7
6
5
4
Function
(128-cell units: 0/128/256/ ... /8046)
(128-cell units: 0/128/256/ ... /65408)
3
2
1
0
Default Value
0_0000_0
(0000h)
0000_0000_0
(0000h)
161
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