NEC mPD98410 User Manual page 135

Field Bit
BL bit [14]
HM bit [9]
HC bit [8]
EO bit [7], [3]
HMS bit [5:4]
CMS bit [1:0]
CHAPTER 4 INTERNAL REGISTERS
R/W
R/W This bit sets the byte alignment of the microprocessor to be
connected. Because the default value after reset is little endian,
care must be exercised if a microprocessor with a big endian
interface accesses this register after reset.
0: Little endian
1: Big endian
R/W Enables or disables the cell discarding function in case of an HEC
error.
0: Enables cell discarding function in case of an HEC error
(discards HEC error cell).
1: Disables cell discarding function in case of an HEC error
(passes HEC error cell).
R/W Selects which of the two external memories is to be selected when
the memory chip select pin is active. Set this bit to "1" to select the
HTT & control memory before issuing a command to the CMD
register. While the switching operation is enabled, the
microprocessor can access the external memory only for the header
translation table (HTT), and cannot access the control memory.
0: Selects cell buffer memory.
1: Selects HTT & control memory.
R/W Sets an even parity or odd parity for parity check of the external
memory.
• Bit 7: Sets HTT & control memory.
• Bit 3: Sets cell buffer memory.
0: Odd parity
1: Even parity
R/W Sets the size of the HTT & control memory (32 bits/word).
00: 64K words
01: 128K words
10: 256K words
11: Reserved
R/W Sets the size of the cell buffer memory (88 bits/word).
00: 64K words
01: 128K words
10: 256K words
11: Reserved
Function Default Value
0
0
0
0
00
00
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