Output Queue Efci Threshold Value Registers (0094H, 00A4H, 00B4H) - NEC mPD98410 User Manual

1.2g atm switch lsi
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4.3.27 Output queue EFCI threshold value registers (0094h, 00A4h, 00B4h)

Register name Address
OQthRCI
0094h
OQthACI
00A4h
OQthUCI
00B4h
15
14
13
These registers set the EFCI threshold value of each logical output port in each class. If a cell in each class is
congested in the output queue, exceeding the corresponding threshold value, EFCI marking is performed of the user
cells and CI/NI marking is performed for the backward RM cells.
Field
Bit
OQthRCI
bit [11:7]
OQthACI
bit [12:7]
OQthUCI
bit [15:7]
162
CHAPTER 4 INTERNAL REGISTERS
Default
xxxx_0000_0xxx_xxxx
xxx0_0000_0xxx_xxxx
0000_0000_0xxx_xxxx
12
11
10
9
8
OQthRCI
OQthACI
OQthUCI
R/W
R/W
0000_0 to 1111_1: EFCI threshold value in RM + nrtVBR class
(128-cell units: 0/128/256/ ... /3968)
R/W
0_0000_0 to 1_1111_1: EFCI threshold value in ABR class
R/W
0000_0000_0 to 1111_1111_1: EFCI threshold value in UBR class
R/W
R/W
R/W
R/W
7
6
5
4
Function
(also used as CI threshold value)
(128-cell units: 0/128/256/ ... /8064)
(128-cell units: 0/128/256/ ... /65408)
3
2
1
0
Default Value
0000_0
(0000h)
0_0000_0
(0000h)
0000_0000_0
(0000h)

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