NEC mPD98410 User Manual page 29

1.2g atm switch lsi
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Symbol
Pin No.
RXADDR23 -
214, 333, 88, 445
RXADDR20
RXDATA27 -
210, 82, 84, 329, 211, 441,
RXDATA20
212, 330
RXSOC2
332
RXENB2_B
213
RXCLAV2
87
UCLK2
331
RXADDR33 -
143, 266, 12, 267
RXADDR30
RXDATA37 -
262, 8, 378, 140, 263, 9, 264,
RXDATA30
141
RXSOC3
11
RXENB3_B
265
RXCLAV3
381
UCLK3
380
CHAPTER 2 PIN FUNCTIONS
Table 2-1. Receive Interface Signals (2/2)
I/O
O
Multi-PHY select address of receive interface 2.
RXADDR23 is the MSB.
I
Cell data input of receive interface 2.
Cell data is input from a PHY layer device in byte units. The
µ PD98410 reads the data at the rising edge of UCLK2.
RXDATA27 is the MSB.
I
Cell transfer start signal of receive interface 2.
This signal is input from a PHY layer device in synchronization with
the first byte of cell data.
O
Transfer enable signal of receive interface 2.
This signal informs a PHY layer device that the µ PD98410 is ready
for reception in the next clock cycle.
I
Cell transfer enable signal of receive interface 2.
This pin inputs a signal that indicates that no more cells will be
supplied to the µ PD98410 after the current cell has been
transferred.
I
UTOPIA clock input of receive interface 2.
Data is transferred/received in synchronization with the rising edge
of this clock.
O
Multi-PHY select address of receive interface 3.
RXADDR33 is the MSB.
I
Cell data input of receive interface 3.
Cell data is input from a PHY layer device in byte units. The
µ PD98410 reads the data at the rising edge of UCLK3.
RXDATA37 is the MSB.
I
Cell transfer start signal of receive interface 3.
This signal is input from a PHY layer device in synchronization with
the first byte of cell data.
O
Transfer enable signal of receive interface 3.
This signal informs a PHY layer device that the µ PD98410 is ready
for reception in the next clock cycle.
I
Cell transfer enable signal of receive interface 3.
This pin inputs a signal that indicates that no more cells will be
supplied to the µ PD98410 after the current cell has been
transferred.
I
UTOPIA clock input of receive interface 3.
Data is transferred/received in synchronization with the rising edge
of this clock.
Function
29

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