Output Port Interface - NEC mPD98410 User Manual

3.1.2 Output port interface

The µ PD98410 has four UTOPIA interfaces and supports multiple PHY device connection allowing up to 24 output
ports. Up to 12 output ports can be connected to each UTOPIA interface.
An output port is mapped to a logical output port number based on the PHY address and UTOPIA interface
number, in accordance with the contents of the port configuration register. The µ PD98410 performs its internal
processing by using this logical output port number.
Figure 3-2 shows an example of connecting multiple PHY devices to one UTOPIA interface.
Figure 3-2. Example of Connecting UTOPIA Transmit Interface
1ATM - Multi-PHY
µ
Of the 5 bits of a PHY address, the low-order 4 bits are connected to the µ PD98410. Pull up the
Remark
highest bit. The µ PD98410 outputs a PHY address of "0" through "11" for the purpose of polling.
The µ PD98410 does not have a TXCLK output. Supply UCLKn to the µ PD98410 as a UTOPIA clock.
CHAPTER 3 FUNCTIONAL OUTLINE
UTOPIA
Level 2
OSC
PD98410
UCLKn
[4]
TXADDRn [3:0]
[3:0]
TXCLAVn
TXENBn_B
TXDATAn [7:0]
TXSOCn
(n:0, 1, 2, 3)
TXCLK
TXADDR [4:0]
155 Mbps
TXCLAV
PHY
TXENB_B
TXDATA [7:0]
TXSOC
TXCLK
TXADDR [4:0]
52 Mbps
TXCLAV
PHY
TXENB_B
TXDATA [7:0]
TXSOC
TXCLK
TXADDR [4:0]
25 Mbps
TXCLAV
PHY
TXENB_B
TXDATA [7:0]
TXSOC
.
.
.
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