Part 2.5: Clock Configuration; Part 2.6: Led - Alinx KINTEX UltraScale FPGA AXKU042 User Manual

Part 2.5: Clock configuration

200Mhz differential clock source
A differential 200MHz clock source is provided on the FPGA development
board to provide the system clock to the FPGA. The crystal differential output is
connected to the FPGA BANK45, which can be used to drive the DDR
controller operating clock and other user logic in the FPGA. The schematic
diagram of the clock source is shown in Figure 5-1.
Figure 5-1: 200Mhz System Clock Source Schematic
System Clock pin assignments:

Part 2.6: LED

There are 2 red LED lights on the ACKU040 core board, one of which is
the power indicator (PWR) and the other is the configuration LED (DONE). The
Power LED and DONE LED will be on after power-up; the DONE LED will be
off when the FPGA is configured for the program.The schematic diagram of
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KINTEX UltraScale+ FPGA Board AXKU042 User Manual
Signal Name
SYS_CLK0_P
SYS_CLK0_N
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FPGA Pin
AK17
AK16