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Troubleshooting
To test the logic analyzer probe cables
Set up the Format menu.
4 4
a a Press the Format key.
b b Move the cursor to the field showing the channel assignments for the pod under test.
Press the Clear Entry key until the pod channels are all assigned (all asterisks (*)).
Press the Done key.
c c Select Master Clock, then select a double edge for the clock of the pod under test.
Turn off the other clocks.
d d In the Master Clock menu, select Setup/Hold, then select 4.0/0.0 ns for the pod being
tested. Select Done. Select Done again to exit the Master Clock menu.
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