General Purpose Spi Interface; Boot Spi - Kontron COMh-caRP User Manual

3.4.8 General Purpose SPI interface

COM-HPC Client and Server modules can support a General Purpose SPI interface (GP_SPI) to connect
multiple peripherals.
The COMh GP_SPI interface on COMh-caAP is handle by the embedded controller. There is an option to
handle it by PCH as well.
EC PCH (Optional)
EC_GP_SPI_CLK PCH_GP_SPI_CLK
EC_GP_SPI_MOSI PCH_GP_SPI_MOSI GP_SPI_MOSI
EC_GP_SPI_MISO PCH_GP_SPI_MISO GP_SPI_MISO
EC_GP_SPI_CS0# PCH_GP_SPI_CS0# GP_SPI_CS0#
EC_GP_SPI_CS1# PCH_GP_SPI_CS1# GP_SPI_CS1#
EC_GP_SPI_CS2# -
EC_GP_SPI_CS3# -
EC_GP_SPI_ALERT# -
Table 23: GP-SPI on COMh-caAP

3.4.9 Boot SPI

The Boot SPI interface is used to support loading all or parts of the system BIOS from a Module or
Carrier based SPI (Serial Peripheral Interface) or SQI (Serial Quad Interface) flash device. The SPI or
SQI flash device can be up to 64 MB (512 Mb). Two flash devices may be used on the Module, allowing
up to 128 MB of boot code storage on the Module. Alternatively there may be a flash device on the
Carrier and / or on the Module, for a combined total of up to 128 MB. In most situations, only one flash
device, either on the Module or on the Carrier, is used.
Alder Lake SPI0 is routed to COMh connector. This interfaces supports serial flash (for BIOS firmware)
and TPM being attached to it only.
COMh Signal PCH Pin Description
BOOT_SPI_CS# SPI0_CS0#
BOOT_SPI_IO0 SPI0_MOSI
BOOT_SPI_IO1 SPI0_MISO
BOOT_SPI_IO2 SPI0_IO2
BOOT_SPI_IO3 SPI0_IO3
BOOT_SPI_CLK SPI0_CLK
VCC_BOOT_SPI -
BSEL0 -
BSEL1 -
BSEL2 -
Table 24: Boot SPI interface on COMh-caAP
COMh-caAP supports on-module and external carrier boot from SPI. COMh signals BSEL[1:3] can be
used to select the desired boot source (see table below)
BSEL
eSPI_CS1# eSPI_CS0# SPI_CS1# SPI_CS0# Boot option Description
0 1 2
1 1 1 Carrier Module
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COMh
GP_SPI_CLK
GP_SPI_CS2#
GP_SPI_CS3#
GP_SPI_ALERT#
Chip select for Carrier Board SPI
Bidirectional data path for Carrier SPI flash
Bidirectional data path for Carrier SPI flash
Bidirectional data path for Carrier SPI flash
Bidirectional data path for Carrier SPI flash
Clock from Module chipset to Carrier SPI
connected to V_3V3_S5
Boot select pins. These pins distinguish between a SPI or eSPI BIOS boot and between an on-Module or
off-Module BIOS. Passed through KSC
Module Module MAFS BIOS on SPI0 or SPI1 on Module
COMh-caAP User Guide
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