Evaluation Board Hardware; Hardware Overview; Sdp-H1 Controller Board; Power Supplies - Analog Devices EVAL-ADAQ7768-1 User Manual

User Guide

EVALUATION BOARD HARDWARE

HARDWARE OVERVIEW

Figure 11 shows the simplified evaluation board block diagram
of EVAL-ADAQ7768-1FMC1Z connected to the SDP-H1 controller
board. The board features ADAQ7768-1 (U5), ADR4540 4.096
V reference (U6), and on-board power solution consisting of the
ADP2300 (U1), ADP7182 (U3), and LT3095 (U2). See the
tion Board Schematic section for more details.

SDP-H1 CONTROLLER BOARD

The EV-ADAQ7768-1FMC1Z evaluation board uses the serial pe-
ripheral interface (SPI) and is connected to the high speed control-
ler board for the system demonstration platform (SDP-H1) controller
board. The SDP-H1 board requires power from a 12 V wall adapter.
®
The SDP-H1 has the Xilinx Spartan 6 and
with connectivity to the PC through a USB 2.0 high speed port.
The controller boards configure and capture data on the daughter
boards from the PC through a USB.
The SDP-H1 has an FMC low pin count (LPC) connector with
full differential LVDS and singled-ended LVCMOS support. It also
features the 160-pin connector, found on the SDP-B, which expos-
®
es the Blackfin processor peripherals. This connector provides
a configurable serial, parallel I
input/output (GPIO) communication lines to the attached daughter
board for the functional description of the on-board power supplies.
analog.com
Figure 11. Simplified Evaluation Board Block Diagram
Evalua-
ADSP-BF527 processor
2
C and SPI, and general-purpose
EVAL-ADAQ7768-1

POWER SUPPLIES

By default, the EV-ADAQ7768-1FMC1Z obtains its power from the
3.3 V rail of the SDP-H1 board. The 3.3 V rail directly supplies
VDD_IO power pin of the ADAQ7768-1. At the same time, this rail
is boosted and regulated to provide the supply rails required by
the ADAQ7768-1, as well as the voltage reference and additional
signal conditioning. The terminal block (P14) can also be used as
an option to externally supply the evaluation board with 3.3 V in
case the user prefers a third-party capture board for evaluation.
The EV-ADAQ7768-1FMC1Z uses LT3095 (U2), a dual-channel
integrated boost and a low dropout (LDO) regulator in a single
package, for its positive supply rails. The LT3095 generates the +15
V needed by the VDD_PGA power pin and the 5.3 V to supply
the built-in LDO of the ADAQ7768-1. This built-in LDO regulator
then generates 5 V to the power pins VDD2_PGA, VDD_FDA,
VDD_ADC, VDD2_ADC, and ADR4540 voltage reference.
Similarly, the ADP2300 (U1), a step-down regulator, scales down
the 3.3 V from the SDP-H1 to -16 V. This -16 V is used by the
ADP7182 (U3), a low noise LDO, to regulate the voltage to -15 V,
which powers the negative supply rail, VSS_PGA, of the device.
Each supply is decoupled at the point it enters the board and again
at the point it connects to each device. The ADAQ7768-1 has built-
Rev. 0 | 7 of 33