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Figure 10-1: PCIe x 8 Interface Design Diagram
PCIex8 Interface Pin Assignment:
Signal Name
PCIE_RX0_P
PCIE_RX0_N
PCIE_RX1_P
PCIE_RX1_N
PCIE_RX2_P
PCIE_RX2_N
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KINTEX-7 FPGA Development Board AX7325B User Manual
Figure 10-2: PCIex8 on the FPGA Board
FPGA Pin
M6
M5
P6
P5
R4
R3
Description
PCIE Channel 0 Data Receive Positive
PCIE Channel 0 Data Receive Negative
PCIE Channel 1 Data Receive Positive
PCIE Channel 1 Data Receive Negative
PCIE Channel 2 Data Receive Positive
PCIE Channel 2 Data Receive Negative
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