Evaluation Board User Guide
POWERING THE BOARD
The
ADAU1962/ADAU1966
supply input of 12 V dc and ground to the power jack; 12 V
draws ~150 mA at higher sample rates with all channels running.
The on-board regulators provide 9.0 V, 5.0 V, and 3.3 V rails. The
9.0 V rail is derived from 12 V by a linear regulator; it provides
voltage to the audio op amp in the active output filter for
Channel 1 and Channel 2. The 5.0 V rail is derived from 12 V
by a switching regulator; it can supply AVDD as well as IOVDD
for the
ADAU1962/ADAU1966
rail is derived from the 5.0 V supply by an LDO linear regulator;
it provides voltage to AVDD and IOVDD as well as other active
peripherals.
AVDD and IOVDD are selected on the board using 0 Ω, 0805
package resistors. Install only one resistor for each load, AVDD
and IOVDD, as described in Figure 6. Figure 6 shows AVDD
fed from 5.0 V and IOVDD fed from 3.3 V.
Figure 6. AVDD and IOVDD Selection Resistors
The
ADAU1962/ADAU1966
that allows the user to derive DVDD and PLLVDD from the
AVDD voltage source. The external PNP transistor, Q1, and
passives, C36, C40 and R56, make the regulator circuit shown in
Figure 7. Short both JP9 and JP11 to activate the circuit; JP9
supplies the emitter of the PNP, and JP11 powers the VSUPPLY
pin (Pin 25) on the ADAU1962/ADAU1966.
Figure 7.
ADAU1962/ADAU1966
evaluation board requires a power
and other peripherals. The 3.3 V
have an internal voltage regulator
Internal Regulator Jumpers
Links are provided along each
to give access for current measurement (see Figure 8). These
links also allow directly supplying voltage from an outside
source.
Figure 8.
RESET FOR THE EVALUATION BOARD
The
ADAU1962/ADAU1966
resetting and powering down the ADAU1962/ADAU1966. S2 on
the evaluation board, shown in Figure 9, is a momentary reset
switch that pulls the master reset ( MR ) line low; this line
controls the reset generator U10. MR is also connected to the
USBi and SDP INTF connectors through steering diodes and
protection resistors so that outside devices can control the reset
state of the evaluation board, as shown in Figure 26. The power
down jumper, JP5, allows the MR line to be tied low. The output
of the reset generator drives the PU_/RST line.
The PU_/RST line is directly connected to two devices: the S/PDIF
receiver and the ADAU1962/ADAU1966. A pull-down resistor
holds the line low until the reset generator, U10, asserts the line
high, as shown in Figure 26. The PU_/RST line is also connected
to a pin on the SDP INTF through a steering diode and protection
resistor, allowing external reset control.
Figure 9. RESET Switch and Power-Down Jumper
Rev. A | Page 5 of 28
ADAU1962/ADAU1966
ADAU1962/ADAU1966
Power Links
evaluation board has provision for
UG-416
power rail
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