UG-416
SETTING UP THE MASTER CLOCK (MCLK)
The MCLK routing on the evaluation board is handled by a block
of jumpers, J5, allowing any one of four sources to be selected:
SPDIF, SMA connector, active OSC, and INTF connector. The
board comes with SPDIF selected, as shown in Figure 10.
Figure 10. SPDIF Selected as MCLK Source
The evaluation board has a 12.288 MHz active oscillator that
can be selected by shorting the OSC_EN jumper, JP8, and
selecting OSC on J5, as shown in Figure 11.
Figure 11. Active OSC-Enabled and Selected as MCLK
When using the SDP interface to add serial audio onto the
evaluation board, MCLK can either be supplied by the SDP
board, or it can be supplied by the MCLKO pin of the
ADAU1962/ADAU1966.
To route MCLK from the SDP interface to the ADAU1962/
ADAU1966, apply a shorting jumper across JP6 (MCLK_SEL),
as shown in Figure 12; this sets the direction of the level
translators on the board to receive an MCLK signal from the
SDP interface, EI3 1A, Pin 119 (EI3_MCLK), as shown in
Figure 28. Next, select INTF on JP5 to route the output of
the MCLK level translator to the MCLKI pin of the
ADAU1962/ADAU1966.
Figure 12. INTF Input Enabled and Selected
To route MCLK from the
interface, remove the shorting jumper from JP6 (MCLK_SEL); this
changes the direction of the level translators and feeds a buffered
version of the MCLKO signal from the
the EI3_MCLK pin on the SDP interface.
CRYSTAL OPERATION
The
ADAU1962/ADAU1966
without R49 on the board, effectively disabling the crystal circuit.
For operation with a crystal, install a 150 Ω, 0402 resistor and
remove any jumpers from J5. For permanent use of the crystal,
remove the 0 Ω resistor, R39.
Figure 13. Crystal Circuit Near
Rev. A | Page 6 of 28
Evaluation Board User Guide
ADAU1962/ADAU1966
ADAU1962/ADAU1966
evaluation board is shipped
ADAU1962/ADAU1966
to the SDP
to
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