16 | Hardware Description
3
Hardware Description
This chapter contains information about the following topics:
• Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
• ECU Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
• Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
• ECU Voltage Supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
• DAP Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
• Trigger Modes: Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
• Pinless Triggering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
• Timer Triggering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
• Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1
Architecture
Fig. 3-1 shows the block diagram of the BR_XETK-S1.0.
ECU -
Connector
JTAG / DAP
ECU VDDPR
Sense -
Port
Power -
Connector
Fig. 3-1
While the microcontroller accesses the program data (not the program code) out
of the data emulation memory provided by the microcontroller, the content of the
data emulation memory can simultaneously be modified by the calibration and
development system through the Automotive Ethernet interface. This process
enables adjustments of parameters, characteristic lines and maps through the
calibration and development system. Using an additional measurement data mem-
ory area, the ECU microcontroller can provide data to the calibration and develop-
ment system by buffering the data (DISTAB13 or DISTAB17) and triggering the
BR_XETK-S1.0 to read the data via DAP. The BR_XETK-S1.0 then reads, buffers,
processes and sends this measured data to the PC.
ETAS BR_XETK-S1.0 | User Guide
I/O -
Buffers
FPGA
ECU Reset
Power Supply Sense Ports
ECU Power Supply (2x)
CALWAKEUP
UBATT1
UBATT2
BR_XETK-S1.0 Architecture
MCU
Trigger
Core
Unit
Functions
Flash
Loader
DMA
Ethernet
MAC
BroadR-
ECU
IEEE1588
Reach
Access
Timesync
Ethernet
Unit
PHY Config
Traffic Detect
Power
Supply
ECU
Monitoring
3.0 ... 36V
Reset &
Power
Control
Standby
3.0 ... 36V
SRAM
System
Data
Flash
XCP on
BroadR-Reach
Ethernet Interface
Low
Pass
Filter
CMC
Phy
Power
Supply
Automatic
Power On
Power
Supply
+U-Batt
100
Mbit/s