ZYNQ Ultrascale + FPGA Core Board ACU3EG User Manual
The eMMC FLASH is connected to the GPIO port of the BANK500 of the
PS part of the ZYNQ UltraScale+. In the system design, it is necessary to
configure the GPIO port function of the PS side as an EMMC interface. Figure
5-1 shows the part of eMMC Flash in the schematic diagram.
Configuration Chip pin assignment:
Signal Name
MMC_DAT0
MMC_DAT1
MMC_DAT2
MMC_DAT3
MMC_DAT4
MMC_DAT5
MMC_DAT6
MMC_DAT7
MMC_CMD
MMC_CCLK
MMC_RSTN
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Figure 5-1: QSPI Flash in the schematic
PS_MIO13_500
PS_MIO14_500
PS_MIO15_500
PS_MIO16_500
PS_MIO17_500
PS_MIO18_500
PS_MIO19_500
PS_MIO20_500
PS_MIO21_500
PS_MIO22_500
PS_MIO23_500
Amazon Store:
Sales Email:
Pin Name
https://www.amazon.com/alinx
rachel.zhou@aithtech.com
Pin Number
AH18
AG18
AE18
AF18
AC18
AC19
AE19
AD19
AC21
AB20
AB18
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