u-blox LARA-R203 System Integration Manual page 43

RI signal behavior
The RI module output line is set by default to the OFF state (high level) at UART initialization. Then, during an
incoming call, the RI line is switched from the OFF state to the ON state with a 4:1 duty cycle and a 5 s period (ON
for 1 s, OFF for 4 s, see Figure 19), until the DTE attached to the module sends the ATA string and the module
accepts the incoming data call. The RING string sent by the module (DCE) to the serial port at constant time
intervals is not correlated with the switch of the RI line to the ON state.
1s 1s
RI OFF RI OFF
RI ON RI ON
0 0
Call incomes Call incomes
Figure 19: RI behavior during an incoming call
The RI line can notify an SMS arrival. When the SMS arrives, the RI line switches from OFF to ON for 1 s (see Figure
20), if the feature is enabled by the AT+CNMI command (see the u-blox AT Commands Manual [2]).
1s 1s
RI OFF RI OFF
RI ON RI ON
0 0
SMS arrives SMS
Figure 20: RI behavior at SMS arrival
This behavior allows the DTE to stay in power saving mode until the DCE related event requests service.
For SMS arrival, if several events occur coincidently or in quick succession, each event independently triggers the
RI line, although the line will not be deactivated between each event. As a result, the RI line may stay at ON for
more than 1 s.
If an incoming call is answered within less than 1 s (with ATA or if auto-answering is set to ATS0=1), then the RI
line is set to OFF earlier.
As a result:
RI line monitoring cannot be used by the DTE to determine the number of received SMSes.
For multiple events (incoming call plus SMS received), the RI line cannot be used to discriminate the two
events, but the DTE must rely on the subsequent URCs and interrogate the DCE with proper commands.
The RI line can additionally notify all the URCs and all the incoming data in PPP and Direct Link connections, if the
feature is enabled by the AT+URING command (for more details, see the u-blox AT Commands Manual [2]): the
RI line is asserted when one of the configured events occur and it remains asserted for 1 s unless another
configured event will happen, with the same behavior described in Figure 20.
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