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Figure 16 illustrates the LARA-R2 series modules' switch-off sequence started by means of the PWR_ON input pin,
allowing storage of current parameter settings in the module's non-volatile memory and a proper network detach,
with the following phases:
A low pulse with appropriate time duration (see LARA-R2 series Data Sheet [1]) is applied at the PWR_ON
input pin, which is normally set high by an internal pull-up: the module starts the switch-off routine when the
PWR_ON signal is released from the low logical level.
At the end of the switch-off routine, all the digital pins are tri-stated and all the internal voltage regulators are
turned off, including the generic digital interfaces supply (V_INT), except the RTC supply (V_BCKP).
Then the module remains in power-off mode as long as a switch-on event does not occur (e.g. applying a
proper low level to the PWR_ON input, or applying a proper low level to the RESET_N input), and enters not-
powered mode if the supply is removed from the VCC pins.
VCC
V_BCKP
PWR_ON
RESET_N
V_INT
Internal Reset
System State
Operational
BB Pads State
Figure 16: LARA-R2 series switch-off sequence by means of PWR_ON pin
The Internal Reset signal is not available on a module pin, but the application can monitor the V_INT pin to
sense the end of the switch-off sequence.
The VCC supply can be removed only after the end of the module internal switch-off routine, i.e. only after
that the V_INT voltage level has gone low.
The duration of each phase in the LARA-R2 series modules' switch-off routines can largely vary depending
on the application / network settings and the concurrent module activities.
UBX-16010573 - R12
The module starts
the switch-off routine
ON
Operational -> Tristate
0 s
~2.5 s
LARA-R2 series - System Integration Manual
VCC
can be removed
OFF
Tristate / Floating
~5 s
System description
Page 33 of 157
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