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RESET_N pin
The following precautions are suggested for the RESET_N line of LARA-R2 series modules, depending on the
application board handling, to satisfy ESD immunity test requirements:
It is recommended to keep the connection line to RESET_N as short as possible
Maximum ESD sensitivity rating of the RESET_N pin is 1 kV (Human Body Model according to JESD22-A114).
Higher protection level could be required if the RESET_N pin is externally accessible on the application board. The
following precautions are suggested to achieve higher protection level:
A general purpose ESD protection device (e.g. EPCOS CA05P4S14THSG varistor array or EPCOS
CT0402S14AHSG varistor) should be mounted on the RESET_N line, close to the accessible point.
The RESET_N application circuit implemented in the EMC / ESD approved reference design of LARA-R2 series
modules is described in Figure 40 and Table 31 (section 2.3.2).
SIM interface
The following precautions are suggested for the LARA-R2 series modules SIM interface (VSIM, SIM_RST, SIM_IO,
SIM_CLK), depending on the application board handling, to satisfy ESD immunity test requirements:
A bypass capacitor of about 22 pF to 47 pF (e.g. Murata GRM1555C1H470J) must be mounted on the lines
connected to the VSIM, SIM_RST, SIM_IO and SIM_CLK pins to assure SIM interface functionality when an
electrostatic discharge is applied to the application board enclosure.
It is suggested to use as short as possible connection lines at SIM pins.
Maximum ESD sensitivity rating of SIM interface pins is 1 kV (Human Body Model according to JESD22-A114).
A higher protection level could be required if SIM interface pins are externally accessible on the application board.
The following precautions are suggested to achieve higher protection level:
A low capacitance (i.e. less than 10 pF) ESD protection device (e.g. Tyco Electronics PESD0402-140) should be
mounted on each SIM interface line, close to the accessible points (i.e. close to the SIM card holder)
The SIM interface application circuit implemented in the EMC / ESD approved reference design of LARA-R2 series
modules is described in Figure 48 and Table 38 (section 2.5).
Other pins and interfaces
All the module pins that are externally accessible on the device integrating LARA-R2 series module should be
included in the ESD immunity test, since they are considered to be a port as defined in ETSI EN 301 489-1 [19].
Depending on applicability, to satisfy ESD immunity test requirements according to ESD category level, all the
module pins that are externally accessible should be protected up to ±4 kV for direct Contact Discharge and up to
±8 kV for Air Discharge applied to the enclosure surface.
The maximum ESD sensitivity rating of all the other pins of the module is 1 kV (Human Body Model according to
JESD22-A114). Higher protection level could be required if the related pin is externally accessible on the application
board. The following precautions are suggested to achieve a higher protection level:
USB interface: a very low capacitance (i.e. less or equal to 1 pF) ESD protection device (e.g. Tyco Electronics
PESD0402-140 ESD protection device) should be mounted on the USB_D+ and USB_D- lines, close to the
accessible points (i.e. close to the USB connector).
Other pins: a general purpose ESD protection device (e.g. EPCOS CA05P4S14THSG varistor array or EPCOS
CT0402S14AHSG varistor) should be mounted on the related line, close to the accessible point.
UBX-16010573 - R12
LARA-R2 series - System Integration Manual
Design-in
Page 127 of 157
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